Dr. Shayak Banerjee Profile

Dr. Shayak Banerjee

at GlobalFoundries

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Author

Publications (9)

Proceedings Article | 9 September 2013 Paper

Under-layer effects for block levels: are they under control?

Dongbing Shao, Bidan Zhang, Shayak Banerjee, Hong Kry, Anuja De Silva, Ranee Kwong, Kisup Chung, Yea-Sen Lin, Alan Leslie

Proceedings Volume 8880, 88802L (2013) https://doi.org/10.1117/12.2029356

KEYWORDS: Critical dimension metrology, Silicon, Etching, Semiconducting wafers, Optical proximity correction, Reflectivity, Near field optics, Computational lithography, Optical lithography, Data modeling

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SPIE Journal Paper | 11 June 2013

Methods for joint optimization of mask and design targets for improving lithographic process window

Shayak Banerjee, Kanak Agarwal, Michael Orshansky

JM3, Vol. 12, Issue 02, 023014, (June 2013) https://doi.org/10.1117/12.10.1117/1.JMM.12.2.023014

KEYWORDS: Optical proximity correction, Photomasks, Nanoimprint lithography, Lithography, Detection and tracking algorithms, Optimization (mathematics), Metals, Semiconducting wafers, Photovoltaics, Source mask optimization

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Proceedings Article | 29 March 2013 Paper

Diffraction pattern based optimization of lithographic targets for improved printability

Shayak Banerjee, Kanak Agarwal

Proceedings Volume 8684, 868405 (2013) https://doi.org/10.1117/12.2011532

KEYWORDS: Diffraction, Lithography, Optical proximity correction, Model-based design, Source mask optimization, Fourier transforms, Photomasks, Detection and tracking algorithms, Nanoimprint lithography, Resolution enhancement technologies

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SPIE Journal Paper | 13 February 2013

Shape slack: a design-manufacturing co-optimization methodology using tolerance information

Shayak Banerjee, Kanak Agarwal, Sani Nassif, Michael Orshansky

JM3, Vol. 12, Issue 01, 013014, (February 2013) https://doi.org/10.1117/12.10.1117/1.JMM.12.1.013014

KEYWORDS: Tolerancing, Transistors, Lithography, Optical proximity correction, Photomasks, Logic, Critical dimension metrology, Manufacturing, Photovoltaics, Image processing

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Proceedings Article | 4 April 2011 Paper

Integrated model-based retargeting and optical proximity correction

Kanak Agarwal, Shayak Banerjee

Proceedings Volume 7974, 79740F (2011) https://doi.org/10.1117/12.879531

KEYWORDS: Optical proximity correction, Nanoimprint lithography, Lithography, Photomasks, Model-based design, Metals, Image processing, Resolution enhancement technologies, Detection and tracking algorithms, Integrated modeling

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Conventional resolution enhancement techniques (RET) are becoming increasingly inadequate at addressing the challenges of subwavelength lithography. In particular, features show high sensitivity to process variation in low-k1 lithography. Process variation aware RETs such as process-window OPC are becoming increasingly important to guarantee high lithographic yield, but such techniques suffer from high runtime impact. An alternative to PWOPC is to perform retargeting, which is a rule-assisted modification of target layout shapes to improve their process window. However, rule-based retargeting is not a scalable technique since rules cannot cover the entire search space of two-dimensional shape configurations, especially with technology scaling. In this paper, we propose to integrate the processes of retargeting and optical proximity correction (OPC). We utilize the normalized image log slope (NILS) metric, which is available at no extra computational cost during OPC. We use NILS to guide dynamic target modification between iterations of OPC. We utilize the NILS tagging capabilities of Calibre TCL scripting to identify fragments with low NILS. We then perform NILS binning to assign different magnitude of retargeting to different NILS bins. NILS is determined both for width, to identify regions of pinching, and space, to locate regions of potential bridging. We develop an integrated flow for 1x metal lines (M1) which exhibits lesser lithographic hotspots compared to a flow with just OPC and no retargeting. We also observe cases where hotspots that existed in the rule-based retargeting flow are fixed using our methodology. We finally also demonstrate that such a retargeting methodology does not significantly alter design properties by electrically simulating a latch layout before and after retargeting. We observe less than 1% impact on latch Clk-Q and D-Q delays post-retargeting, which makes this methodology an attractive one for use in improving shape process windows without perturbing designed values.

Proceedings Article | 23 March 2011 Paper

Simultaneous OPC and decomposition for double exposure lithography

Shayak Banerjee, Kanak Agarwal, Michael Orshansky

Proceedings Volume 7973, 79730E (2011) https://doi.org/10.1117/12.879540

KEYWORDS: Photomasks, Optical proximity correction, Lithography, Image processing, Motion analysis, Source mask optimization, Semiconducting wafers, System on a chip, Photovoltaics, Printing

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Double exposure techniques are an economically viable method for extending the life of the current 193nm wavelength immersion lithography techniques into future generations of semiconductor scaling. One popular example of double exposure is the use of double dipole illumination, where the X and Y dipoles are separately optimized for vertical and horizontal features respectively. The primary challenge in such double exposure techniques lies in the process of target layout decomposition into patterns that can be optimally printed using their respective source. Current approaches for decomposition are rule-based. They suffer from the drawbacks of scalability, rule count explosion and inability to guarantee sufficient yield in the presence of process variation. Further, rules are characterized specific to sources and are relatively easy to develop for dipoles, but far more difficult to develop for more complex sources such as used in source mask optimization (SMO). Decomposed target layouts have to further undergo optical proximity correction (OPC) in order to be converted to a mask for use in manufacturing. In this paper, we propose a novel approach which integrates the processes of decomposition and optical proximity correction. We preclude the intermediate target decomposition stage. Instead, we directly optimize the masks for both exposures simultaneously in order to obtain a wafer image that both closely matches the target layout and is also robust to process variation. For this purpose, we define a lithographic cost function that is a weighted sum of intensity error and intensity slope. We develop methods to analytically predict the change in this cost function due to movement of fragments on each mask. We then utilize a gradient-descent algorithm for fragment movement to minimize the cost function. Since our methodology is based on the knowledge of the SOCS decomposition kernels, it is not restricted to dipoles alone, but can be utilized for any complex sources for which such kernels are known. Our experiments on 1x metal (M1) show significant improvement in layout process window compared to traditional rule-based decomposition methods.

Proceedings Article | 13 March 2009 Paper

Compensating non-optical effects using electrically driven optical proximity correction

Shayak Banerjee, Kanak Agarwal, James Culp, Praveen Elakkumanan, Lars Liebmann, Michael Orshansky

Proceedings Volume 7275, 72750E (2009) https://doi.org/10.1117/12.814872

KEYWORDS: Optical proximity correction, Transistors, Ions, Telescopic pixel displays, Lithography, Photomasks, Semiconducting wafers, Annealing, Manufacturing, Optics manufacturing

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Chip performance and yield are increasingly limited by systematic and random variations introduced during wafer processing. Systematic variations are layout-dependent and can be broadly classified as optical or non-optical in nature. Optical effects have their origin in the lithography process including mask, RET, and resist. Non-optical effects are layout-dependent systematic variations which originate from processes other than lithography. Some examples of nonoptical effects are stress variations, well-proximity effect, spacer thickness variations and rapid thermal anneal (RTA) variations. Semiconductor scaling has led to an increase in the complexity and impact of such effects on circuit parameters. A novel technique for dataprep called electrically-driven optical proximity correction (ED-OPC) has been previously proposed which replaces the conventional OPC objective of minimization of edge placement error (EPE) with an electrical error related cost function. The introduction of electrical objectives into the OPC flow opens up the possibility of compensating for electrical variations which do not necessarily originate from the lithographic process. In this paper, we propose to utilize ED-OPC to compensate for optical as well as non-optical effects in order to mitigate circuit-limited variability and yield. We describe the impact of non-optical effects on circuit parameters such as threshold voltage and mobility. Given accurate models to predict variability of circuit parameters, we show how EDOPC can be leveraged to compensate circuit performance for matching designer intent. Compared to existing compensation techniques such as gate length biasing and metal fills, the primary advantage of using ED-OPC is that the process of fragmentation in OPC allows greater flexibility in tuning transistor properties. The benefits of using ED-OPC to compensate for non-optical effects can be observed in reduced guard-banding, leading to less conservative designs. In addition, results show a 4% average reduction in spread in timing in compensating for intra-die threshold voltage variability, which potentially translates to mitigation of circuit-limited yield.

Proceedings Article | 19 March 2008 Paper

Analysis of systematic variation and impact on circuit performance

Shayak Banerjee, Praveen Elakkumanan, Dureseti Chidambarrao, James Culp, Michael Orshansky

Proceedings Volume 6925, 69250K (2008) https://doi.org/10.1117/12.772075

KEYWORDS: Resistance, Lithography, Etching, Device simulation, Transistors, Manufacturing, Instrument modeling, Statistical analysis, Performance modeling, Photomasks

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Proceedings Article | 4 March 2008 Paper

Electrically driven optical proximity correction

Shayak Banerjee, Praveen Elakkumanan, Lars Liebmann, James Culp, Michael Orshansky

Proceedings Volume 6925, 69251W (2008) https://doi.org/10.1117/12.790786

KEYWORDS: Optical proximity correction, Photomasks, Transistors, Lithography, Printing, Detection and tracking algorithms, Algorithm development, Immersion lithography, Photoresist processing, 193nm lithography

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