We create a 40Gbit/s multi-lane distribution (MLD) interface converter for STM-256 to STL-256.4 and OTU3 to
OTL3.4. We successfully demonstrate a cost-effective optical transceiver for STM-256/OC-768/40G-POS by using our
40Gbit/s MLD interface converter prototype.
We use a 65nm CMOS process technology to develop 40Gbit/s interface conversion prototype circuits for 40GbE, STM-
256/OC-768 and OTU3 tri-rate serial signal transport. For the first time, interface conversion functions from SFI-5.1 to
SFI-5.2/XLAUI are demonstrated on a 16:4 MUX prototype chip, and from SFI-5.2/XLAUI to SFI-5.1 on a 4:16
DEMUX prototype chip. The 16:4 MUX and 4:16 DEMUX prototype chips show excellent jitter performance and
consume 1.6 and 1.7 W, respectively.
This paper describes recent advances in high capacity WDM transmission technologies. The 40 Gbps OTN system-LSI
implementation technologies for 40 Gbps WDM transport systems, which accommodate not only 40 Gbps client signals
such as STM-256/OC-768, but also STM-64/OC192 and 10 gigabit Ethernet (10 GbE) client signals, and support fully
transparent transport are reviewed. A 44.6Gbps RZ-DQPSK WDM transmission experiment utilizing a single chip OTN
system-LSI is described. The challenges for over 10 Tbps long haul WDM transmission with the channel rate over 100
Gbps for the WAN (wide area network) transport of 100 gigabit Ethernet (100 GbE) LAN client signals are also
reviewed. Feasibility of novel modulation formats and distributed amplification is confirmed by WDM transmission