Mr. Shinya Wakamizu Profile

Shinya Wakamizu

at Tokyo Electron Kyushu Ltd

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Author

Publications (7)

Proceedings Article | 16 March 2009 Paper

Immersion-cluster uptime enhancement technology toward high-volume manufacturing

H. Kyouda, K. Nakano, R. Tanaka, T. Fujiwara, S. Wakamizu

Proceedings Volume 7274, 72743M (2009) https://doi.org/10.1117/12.814112

KEYWORDS: Contamination, Semiconducting wafers, Particles, Bridges, Thin film coatings, High volume manufacturing, Coating, Immersion lithography, Process control, Image filtering

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Proceedings Article | 4 December 2008 Paper

193-nm immersion lithography for high volume manufacturing using novel immersion exposure tool and coater/developer system

Katsushi Nakano, Shinya Wakamizu, Hideharu Kyouda, Tomoharu Fujiwara

Proceedings Volume 7140, 714039 (2008) https://doi.org/10.1117/12.804675

KEYWORDS: Immersion lithography, Semiconducting wafers, Particles, Coating, Lithography, Photoresist processing, Thin film coatings, Scanners, Scanning electron microscopy, Semiconductors

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Proceedings Article | 4 April 2008 Paper

Process development for high scan speed ArF immersion lithography

Hideharu Kyoda, Hirofumi Takeguchi, Nobuji Matsumura, Tomoharu Fujiwara, Koichi Fujiwara, Hirokazu Tanizaki, Shinya Wakamizu, Yoshikazu Yamaguchi, Norihiko Sugie, Hiroshi Arima, Junichi Kitano, Kosuke Yoshihara, Katsushi Nakano, Kentaro Goto

Proceedings Volume 6923, 69230D (2008) https://doi.org/10.1117/12.771795

KEYWORDS: Lithography, Immersion lithography, Thin film coatings, 193nm lithography, Semiconducting wafers, Bridges, Defect inspection, Photoresist processing, Line width roughness, Semiconductors

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Proceedings Article | 2 April 2007 Paper

Adapting immersion exposure to mass production by adopting a cluster of novel resist-coating/developing and immersion-exposure equipment

Tadamasa Kawakubo, Shinya Wakamizu, Takeshi Shimoaoki, Tomoharu Fujiwara, Hideharu Kyoda, Jun Ishikawa, Yuuki Ishii

Proceedings Volume 6519, 65190C (2007) https://doi.org/10.1117/12.711853

KEYWORDS: Thin film coatings, Immersion lithography, Semiconducting wafers, Photoresist processing, Silicon, Scanning electron microscopy, Lithography, Image processing, Semiconductors, Data processing

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Proceedings Article | 22 March 2007 Paper

Defect transfer from immersion exposure process to post processing and defect reduction using novel immersion track system

Yoshiharu Ono, Shinya Wakamizu, Junichi Kitano, Kazuyuki Suko, Osamu Miyahara, Tetsuro Hanawa, Takeshi Shimoaoki, Shinroku Maejima

Proceedings Volume 6519, 651924 (2007) https://doi.org/10.1117/12.711354

KEYWORDS: Etching, Immersion lithography, Photoresist processing, Semiconducting wafers, Lithography, Thin film coatings, Scanning electron microscopy, Defect inspection, Photography, Lens design

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As a promising way to scale down semiconductor devices, 193-nm immersion exposure lithography is being developed at a rapid pace and is nearing application to mass production. This technology allows the design of projection lens with higher numerical aperture (NA) by filling the space between the projection lens and the silicon wafer with a liquid (de-ionized water). However, direct contact between the resist film and water during exposure creates a number of process risks. There are still many unresolved issues and many problems to be solved concerning defects that arise in 193-nm immersion lithography. The use of de-ionized water during the exposure process in 193-nm immersion lithography can lead to a variety of problems. For example, the trapping of microscopic air bubbles can degrade resolution, and residual water droplets left on the wafer surface after immersion exposure can affect resolution in the regions under those droplets. It has also been reported that the immersion of resist film in de-ionized water during exposure can cause moisture to penetrate the resist film and dissolve resist components, and that immersion can affect critical dimensions as well as generate defects. The use of a top coat is viewed as one possible way to prevent adverse effects from the immersion of resist in water, but it has been reported that the same problems may occur even with a top coat and that additional problems may be generated, such as the creation of development residues due to the mixing of top coat and resist. To make 193-nm immersion lithography technology practical for mass production, it is essential that the above defect problems be solved. Importance must be attached to understanding the conditions that give rise to residual defects and their transference in the steps between lithography and the etching/cleaning processes. In this paper, we use 193-nm immersion lithography equipment to examine the transference (traceability) of defects that appear in actual device manufacturing. It will be shown that defect transfer to the etching process can be significantly reduced by the appropriate use of defect-reduction techniques.

Proceedings Article | 14 May 2004 Paper

Improvement of pattern collapse issue by additive-added D.I water rinse process: II

Shinya Wakamizu, Yoshiaki Yamada, Keiichi Tanaka, Osamu Miyahara, Junichi Kitano

Proceedings Volume 5376, (2004) https://doi.org/10.1117/12.534983

KEYWORDS: Etching, Photoresist processing, Standards development, Lithography, Semiconducting wafers, Critical dimension metrology, Scanning electron microscopy, Capillaries, Ions, Silicon

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Proceedings Article | 12 June 2003 Paper

Feasibility study of defects in 157-nm resist process

Seiro Miyoshi, Takamitsu Furukawa, Toshiro Itani, Shinya Wakamizu, Etsurou Kawaguchi, Yukio Kiba

Proceedings Volume 5039, (2003) https://doi.org/10.1117/12.485053

KEYWORDS: Nitrogen, Polymers, Fluorine, Chemical species, Photoresist processing, Light sources, Transmittance, Deep ultraviolet, 193nm lithography, Lithography

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Showing 5 of 7 publications

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