Progress in developing high speed ADC's occurs rather slowly - at a resolution increase of 1.8 bits per decade. This slow progress is mostly caused by the inherent jitter in electronic sampling - currently on the order of 250 femtoseconds in the most advanced CMOS circuitry. Advances in femtosecond lasers and laser stabilization have led to the development of sources of ultrafast optical pulse trains that show jitter on the level of a few femtoseconds over the time spans of typical sampling windows and can be made even smaller. The MIT-GHOST (GigaHertz High Resolution Optical Sampling Technology) Project funded under DARPA's Electronic Photonic Integrated Circuit (EPIC) Program is trying to harness the low noise properties of femtosecond laser sources to overcome the electronic bottleneck inherently present in pure electronic sampling systems. Within this program researchers from MIT Lincoln Laboratory and MIT Campus develop integrated optical components and optically enhanced electronic sampling circuits that enable the fabrication of an electronic-photonic A/D converter chip that surpasses currently available technology in speed and resolution and opens up a technology development roadmap for ADC's. This talk will give an overview on the planned activities within this program and the current status on some key devices such as wavelength-tunable filter banks, high-speed modulators, Ge photodetectors, miniature femtosecond-pulse lasers and advanced sampling techniques that are compatible with standard CMOS processing.
A new on-chip silicon-based Bragg cladding waveguide with full CMOS compatibility is developed. This novel optical waveguide has a low refractive index core (SiO<sub>2</sub>) surrounded by a 1D photonic crystal cladding. The cladding consists of several dielectric bilayers, where each bilayer consists of a high index-contrast pair of layers of Si and Si<sub>3</sub>N<sub>4</sub>. This new waveguide guides light based on omnidirectional reflection, reflecting light at any angle or polarization back into the core. Its fabrication is fully compatible with current microelectronics processes. In principle, a core of any low-index material can be realized with our novel structure, including air. Potential applications include tight turning radii, high power transmission, nonlinear properties engineering and biomaterials sensors on silicon chip.
Air trench structure for reduced-size bends in low (Δn=0.01-0.1) and medium (Δn=0.1-0.3) index contrast waveguides is proposed. Local high index contrast at bends is achieved by introducing air trenches. An air trench bend consists of cladding tapers to avoid junction loss, providing adiabatic mode shaping between low and high index contrast regions. Drastic reduction in effective bend radius is achieved. We present FDTD simulations of bends in representative silica index contrasts, fabrication scheme and waveguide loss measurement results using Fabry-Perot loss measurement technique. We employed CMOS compatible processes to realize air trench bends and T-splitters to achieve low production cost and high yield. A simple, compact waveguide and T-splitter are fabricated and evaluated. The loss measurement results show that losses are consistent with theoretical simulations. By using air trench waveguides, other applications such as BioMEMS (e.g. Evanescent-field sensor) or EDWA can be realized.
Sharp bends in low index contrast waveguides using tapered air trenches are proposed. To minimize cladding-trench junction loss, cladding tapers are designed to provide adiabatic mode shaping between low and high index contrast regions. Drastic reduction in effective bend radius is predicted. We present 2D FDTD/EIM simulations of bends in representative silica index contrasts. Substrate loss in air trenches of finite depth is investigated, and the required trench depth, given an acceptable substrate loss, is calculated. Fabrication steps are described.