In recent years, Directed-Self Assembly (DSA) of block copolymers (BCPs) has gained relevance as a promising ‘bottomup’ technique to produce nano-lithographic patterns. To make DSA a reliable and robust technique, much of the research is focused on reducing defectivity and mitigating Line Edge Roughness (LER) and Line Width Roughness (LWR) of the pre-and post-etched polymer blocks. High roughness values often inhibit the smooth functioning of the transistors by constraining the electron flow through the spaced channels. It is thus crucial to develop novel modeling and simulations techniques for DSA to harness the full potential of this technique and thus meet the ITRS roadmap LER standards. In our recent work, we have outlined our CGMD framework and the subsequent etching methodology used to produce line space patterns created by lamellae forming polystyrene-block-polymethyl methacrylate (PS-b-PMMA) with periods of about 28 nm, on a patterned Liu-Nealey (LiNe) flow substrate. In this paper, we present a comparative study of the experimental LER / LWR calculations with our coarse-grained molecular dynamics (CGMD) simulation results. We employ highly parallelized supercomputing resources on a full-scale system with a detailed topographical substrate and exact matching of the BCP molecular weight. The simulations offer us a 3-D profile of the BCP domains and the subsequent resist pattern formed after etching, thus providing us with roughness estimates across the film thickness for three process stages: anneal, pre-etch and post-etch. Additionally, we also evaluate the edge morphology in the Fourier domain by generating power spectral density curves.