Mr. Sohan S. Mehta Profile

Mr. Sohan S. Mehta

Principal Member of Technical Staff ( PMTS) at GLOBALFOUNDRIES Inc.

SPIE Involvement:

Author

Area of Expertise:

Lithography process design interaction , EUV , Multiple patterning ( LELE,LELELE, SADP) , Defectivity analysis and improvement , Thick film PSPI process , Immersion lithography and NTD

Profile Summary

Sohan Mehta is currently PMTS in the advanced lithography group at the GLOBALFOUNDRIES Inc. Malta, NY, USA. He earned his MS degree in Applied Optics from the Indian Institute of Technology(IIT) Delhi, India in 1997.He has published over 40 papers ( lithography field) in prestigious conferences and journals including invited papers.Sohan has filed 8 US patents and 2 trade secrets in advanced lithography. He is serving as a reviewer for several journals in lithography area. Sohan has been working in lithography process development for 20 years which includes experience with Micron DRAM Singapore,IME (research institute) Singapore, IBM East Fishkill and Globalfoundries Malta,NY.
His current focus is NTD process development, process- design interaction, multiple patterning, defectivity improvements and thick film PSPI process.

Publications (21)

PROCEEDINGS ARTICLE | March 13, 2018

Thick photosensitive polyimide film side wall angle variability and scum improvement for IC packaging stress control

Proc. SPIE. 10586, Advances in Patterning Materials and Processes XXXV

KEYWORDS: Packaging, Modulation, Metals, Copper, Silicon, Reliability, 3D modeling, Finite element methods, Semiconducting wafers, Back end of line

PROCEEDINGS ARTICLE | March 28, 2017

High-throughput electrical characterization for robust overlay lithography control

Proc. SPIE. 10145, Metrology, Inspection, and Process Control for Microlithography XXXI

KEYWORDS: Semiconductors, Lithography, Optical lithography, Metals, Image processing, Reliability, Resistance, Process control, Photomasks, Semiconductor manufacturing, Overlay metrology, Back end of line

PROCEEDINGS ARTICLE | March 20, 2015

Process variation challenges and resolution in the negative-tone develop double patterning for 20nm and below technology node

Proc. SPIE. 9425, Advances in Patterning Materials and Processes XXXII

KEYWORDS: Optical lithography, Etching, Image processing, Photomasks, Double patterning technology, Nanoimprint lithography, Critical dimension metrology, Neodymium, Photoresist processing, Binary data

Immersion based 20nm technology node and below becoming very challenging to chip designers, process and integration due to multiple patterning to integrate one design layer . Negative tone development (NTD) processes have been well accepted by industry experts for enabling technologies 20 nm and below. 193i double patterning is the technology solution for pitch down to 80 nm. This imposes tight control in critical dimension(CD) variation in double patterning where design patterns are decomposed in two different masks such as in litho-etch-litho etch (LELE). CD bimodality has been widely studied in LELE double patterning. A portion of CD tolerance budget is significantly consumed by variations in CD in double patterning.

The objective of this work is to study the process variation challenges and resolution in the Negative Tone Develop Process for 20 nm and Below Technology Node. This paper describes the effect of dose slope on CD variation in negative tone develop LELE process. This effect becomes even more challenging with standalone NTD developer process due to q-time driven CD variation. We studied impact of different stacks with combination of binary and attenuated phase shift mask and estimated dose slope contribution individually from stack and mask type. Mask 3D simulation was carried out to understand theoretical aspect. In order to meet the minimum insulator requirement for the worst case on wafer the overlay and critical dimension uniformity (CDU) budget margins have slimmed. Besides the litho process and tool control using enhanced metrology feedback, the variation control has other dependencies too. Color balancing between the two masks in LELE is helpful in countering effects such as iso-dense bias, and pattern shifting. Dummy insertion and the improved decomposition techniques [2] using multiple lower priority constraints can help to a great extent. Innovative color aware routing techniques [3] can also help with achieving more uniform density and color balanced layouts.

PROCEEDINGS ARTICLE | March 18, 2015

Investigating deprotection-induced shrinkage and retro-grade sidewalls in NTD resists

Proc. SPIE. 9426, Optical Microlithography XXVIII

KEYWORDS: Atrial fibrillation, Signal attenuation, Electrons, Distortion, Atomic force microscopy, Scanning electron microscopy, Photoresist materials, Photomasks, Panoramic photography, Semiconducting wafers

PROCEEDINGS ARTICLE | April 17, 2014

Integration of an EUV metal layer: a 20/14nm demo

Proc. SPIE. 9048, Extreme Ultraviolet (EUV) Lithography V

KEYWORDS: Optical lithography, Deep ultraviolet, Metals, Inspection, Photomasks, Extreme ultraviolet, Extreme ultraviolet lithography, Optical proximity correction, Semiconducting wafers, Overlay metrology

PROCEEDINGS ARTICLE | April 2, 2014

Evaluation of lens heating effect in high transmission NTD processes at the 20nm technology node

Proc. SPIE. 9050, Metrology, Inspection, and Process Control for Microlithography XXVIII

KEYWORDS: Reticles, Optical lithography, Computational modeling, Calibration, Wavefronts, Photomasks, Source mask optimization, Critical dimension metrology, Semiconducting wafers, Overlay metrology

PROCEEDINGS ARTICLE | April 18, 2013

High order wafer alignment for 20nm node logic process

Proc. SPIE. 8681, Metrology, Inspection, and Process Control for Microlithography XXVII

KEYWORDS: Lithography, Logic, Annealing, Laser processing, Distortion, Transistors, Semiconductor manufacturing, Optical alignment, Semiconducting wafers, Overlay metrology

PROCEEDINGS ARTICLE | March 29, 2013

20nm VIA BEOL patterning challenges

Proc. SPIE. 8682, Advances in Resist Materials and Processing Technology XXX

KEYWORDS: Optical lithography, Etching, Metals, Dielectrics, Photomasks, Double patterning technology, Critical dimension metrology, Reactive ion etching, Semiconducting wafers, Back end of line

PROCEEDINGS ARTICLE | March 29, 2013

Investigation of trench and contact hole shrink mechanism in the negative tone develop process

Proc. SPIE. 8682, Advances in Resist Materials and Processing Technology XXX

KEYWORDS: Lithography, Optical lithography, Data modeling, Modulation, Polymers, Image processing, Diffusion, Manufacturing, Critical dimension metrology, Photoresist processing

PROCEEDINGS ARTICLE | March 23, 2012

Computational study of line tip printability of sub-20-nm technology

Proc. SPIE. 8322, Extreme Ultraviolet (EUV) Lithography III

KEYWORDS: Lithography, Optical lithography, Lithographic illumination, Metals, Printing, Photomasks, Extreme ultraviolet, Extreme ultraviolet lithography, Double patterning technology, Line edge roughness

PROCEEDINGS ARTICLE | March 20, 2012

Assessment of negative tone development challenges

Proc. SPIE. 8325, Advances in Resist Materials and Processing Technology XXIX

KEYWORDS: Roads, Etching, Polymers, Image processing, Scanning electron microscopy, Optical proximity correction, Reactive ion etching, Neodymium, Semiconducting wafers, Photoresist developing

PROCEEDINGS ARTICLE | March 16, 2009

C-quad polarized illumination for back end thin wire: moving beyond annular illumination regime

Proc. SPIE. 7274, Optical Microlithography XXII

KEYWORDS: Lithography, Diffraction, Reticles, Optical lithography, Polarization, Fourier transforms, Critical dimension metrology, Line edge roughness, Semiconducting wafers, Fiber optic illuminators

PROCEEDINGS ARTICLE | April 1, 2008

Reflectivity-induced variation in implant layer lithography

Proc. SPIE. 6924, Optical Microlithography XXI

KEYWORDS: Oxides, Lithography, Etching, Silicon, Reflectivity, Control systems, Photomasks, Critical dimension metrology, Semiconducting wafers, Chemical mechanical planarization

SPIE Journal Paper | April 1, 2005

Intensity imbalance in phase shift masks and correction by multiple exposures

Mukherjee-Roy, Moitreyee , Singh, Navab , Mehta, Sohan , Kimura, Yasuki , Suda, Hideki , Nagai, Kazunori

JM3 Vol. 4 Issue 02

KEYWORDS: Photomasks, Phase shifts, Monochromatic aberrations, Reticles, Diffraction, Critical dimension metrology, Cadmium, Scattering, Optical lithography, Semiconducting wafers

PROCEEDINGS ARTICLE | December 20, 2004

Spot size mode converter for efficient coupling to SiN waveguides

Proc. SPIE. 5577, Photonics North 2004: Optical Components and Devices

KEYWORDS: Clocks, Waveguides, Cladding, Etching, Silicon, Structured optical fibers, Single mode fibers, Wave propagation, Photonic integrated circuits, Fiber couplers

PROCEEDINGS ARTICLE | December 20, 2004

New fabrication technology for photonic crystal waveguides

Proc. SPIE. 5577, Photonics North 2004: Optical Components and Devices

KEYWORDS: Amorphous silicon, Lithography, Reticles, Optical lithography, Deep ultraviolet, Etching, Silicon, Photonic crystals, Scanning electron microscopy, Photomasks

PROCEEDINGS ARTICLE | May 28, 2004

Key challenges in across-pitch 0.33-k1 trench patterning using hybrid mask

Proc. SPIE. 5377, Optical Microlithography XVII

KEYWORDS: Lithography, Optical lithography, Modulation, Etching, Scanners, Manufacturing, Scanning electron microscopy, Photomasks, Binary data, Phase shifts

PROCEEDINGS ARTICLE | May 24, 2004

Alignment in chromeless masks

Proc. SPIE. 5375, Metrology, Inspection, and Process Control for Microlithography XVIII

KEYWORDS: Monochromatic aberrations, Reticles, Optical lithography, Etching, Scanning electron microscopy, Photomasks, Mask making, Structural design, Overlay metrology, Phase shifts

PROCEEDINGS ARTICLE | May 3, 2004

Patterning sub-50-nm Fin-FET using KrF lithography tool

Proc. SPIE. 5379, Design and Process Integration for Microelectronic Manufacturing II

KEYWORDS: Lithography, Electron beam lithography, Reticles, Optical lithography, Scanners, Scanning electron microscopy, Directed energy weapons, Photomasks, Field effect transistors, Semiconducting wafers

PROCEEDINGS ARTICLE | June 26, 2003

Impact of scattering bars in damascene trench patterning

Proc. SPIE. 5040, Optical Microlithography XVI

KEYWORDS: Diffraction, Reticles, Optical lithography, Modulation, Scattering, Photomasks, Critical dimension metrology, Semiconducting wafers, Binary data, Phase shifts

PROCEEDINGS ARTICLE | June 2, 2003

Evaluation of alignment target designs for Cu and low-K dual damascene processes

Proc. SPIE. 5038, Metrology, Inspection, and Process Control for Microlithography XVII

KEYWORDS: Sensors, Etching, Copper, Dielectrics, Signal processing, Photomasks, Optical alignment, Thin film coatings, Semiconducting wafers, Overlay metrology

Showing 5 of 21 publications

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