Ideal characteristics of any universal memory technology should be to meet the performance of a SRAM, density as in DRAM and non-volatility (like Flash). Flash memories have been dominant in the non-volatile race based on relatively standard silicon design processes. Memory dominance on SoC's continues to increase and hence tomorrow's high quality SOC's require high quality memory today. The emerging mainstream memory technology should be (1) a universal memory (2) a process solution (3) suitable for the SoC market. This paper will discuss a few emerging memory technologies that are being researched today.
The endurance of a FRAM is 1014 cycles with better retention times (>10 years). FRAM's have fast read/write access, low standby current, scalable and capable of ultra-low voltage operation. FRAM's share architectural features such as addressing schemes and I/O circuitry with other types of random access memories (DRAMs), but they have distinct features with respect to accessing the stored data, sensing, and overall circuit topology. The FRAM is a great advantage for SoC and wireless and mobile products, since it supports non-volatility but also delivers a fast memory access. Today's 1T/1C FRAM have an access time of 30 nS, a cycle time of 35 nS at 1.2 V power supply in a standard CMOS process with 2 mask adders. The cell size of a FRAM is comparable to that of a planar DRAM and is 3 - 4x denser than SRAM. This paper outlines the circuit innovations in embedded ferroelectric memories, and will cover the architecture, reference circuits, sense amplifiers, reliability issues and references to other memory technologies.
Conference Committee Involvement (2)
Smart Structures, Devices, and Systems II
13 December 2004 | Sydney, Australia
Microelectronics: Design, Technology, and Packaging