In this paper we present first results from a backside illuminated CMOS image sensor that we fabricated on high resistivity silicon. Compared to conventional CMOS imagers, a thicker photosensitive membrane can be depleted when using silicon with low background doping concentration while maintaining low dark current and good MTF performance. The benefits of such a fully depleted silicon sensor are high quantum efficiency over a wide spectral range and a fast photo detector response. Combining these characteristics with the circuit complexity and manufacturing maturity available from a modern, mixed signal CMOS technology leads to a new type of sensor, with an unprecedented performance spectrum in a monolithic device. Our fully depleted, backside illuminated CMOS sensor was designed to operate at integration times down to 100nsec and frame rates up to 1000Hz. Noise in Integrate While Read (IWR) snapshot shutter operation for these conditions was simulated to be below 10e<sup>-</sup> at room temperature. 2×2 binning with a 4× increase in sensitivity and a maximum frame rate of 4000 Hz is supported. For application in hyperspectral imaging systems the full well capacity in each row can individually be programmed between 10ke<sup>-</sup>, 60ke<sup>-</sup> and 500ke<sup>-</sup>. On test structures we measured a room temperature dark current of 360pA/cm<sup>2</sup> at a reverse bias of 3.3V. A peak quantum efficiency of 80% was measured with a single layer AR coating on the backside. Test images captured with the 50μm thick VGA imager between 30Hz and 90Hz frame rate show a strong response at NIR wavelengths.
Arrays of independently tunable MEMS Fabry-Perot filters have been developed that enable spectral tuning over the
range of 11 - 8 microns with a filter bandwidth of ~ 120 nm. Actuation is provided using a MEMS driver IC that is
hybridized to the MEMS chip. Combining the filter array with an IR FPA enables spatially-resolved spectral tuning in a
compact architecture. Tunable spectral response data from the first integrated tunable filter / FPA device are presented.
Teledyne Imaging Sensors develops and produces high performance silicon-based CMOS image sensors, with associated
electronics and packaging for astronomy and civil space. Teledyne's silicon detector sensors use two technologies:
monolithic CMOS, and silicon PIN hybrid CMOS. Teledyne's monolithic CMOS sensors are large (up to 59 million
pixels), low noise (2.8 e- readout noise demonstrated, 1-2 e- noise in development), low dark current (<10 pA/cm<sup>2</sup> at
295K) and can provide in-pixel snapshot shuttering with >10<sup>3</sup> extinction and microsecond time resolution. The QE
limitation of frontside-illuminated CMOS is being addressed with specialized microlenses and backside illumination. A
monolithic CMOS imager is under development for laser guide star wavefront sensing. Teledyne's hybrid silicon PIN
CMOS sensors, called HyViSI<sup>TM</sup>, provide high QE for the
x-ray through near IR spectral range and large arrays
(2K×2K, 4K×4K) are being produced with >99.9% operability. HyViSI dark current is 5-10 nA/cm<sup>2</sup> (298K), and further reduction is expected from ongoing development. HyViSI presently achieves <10 e- readout noise, and new high speed
HyViSI arrays being produced in 2008 should achieve <4 e- readout noise at 900 Hz frame rate. A Teledyne 640×480
pixel HyViSI array is operating in the Mars Reconnaissance Orbiter, a 1K×1K HyViSI array will be launched in 2008 in
the Orbiting Carbon Observatory, and HyViSI arrays are under test at several astronomical observatories. The
advantages of CMOS in comparison to CCD include programmable readout modes, faster readout, lower power,
radiation hardness, and the ability to put specialized processing within each pixel. We present one example of in-pixel
processing: event driven readout that is optimal for lightning detection and x-ray imaging.
Imaging instruments with state-of-the-art HgCdTe MWIR and LWIR detectors often have limited cooling resources. Therefore, they may need to deal with large detector dark currents and/or optics thermal emission currents. The sum of dark and thermal emission currents form an undesirable "offset" to the desired signal current, which can be orders of magnitude greater than the signal. With modest instrument thermal stability, the offset current change is small over instrument line imaging times on the order of 10 seconds. This allows cancellation or subtraction of the offset by injecting an equal and opposite current into the integration node. The exact value of this cancellation current can be simultaneously measured and stored for every pixel in a self calibrating deep space (negligible signal) scan cycle, leaving only the desired signal current when the aperture is subsequently scanned across the scene. Offset subtraction dramatically reduces the dynamic range requirements of the Readout Integrated Circuit (ROIC) signal chain at the cost of additional ROIC shot noise. However, this shot noise is rarely dominant in MWIR and LWIR applications so overall NEDT performance does not suffer. By subtracting the offset and dramatically reducing ROIC dynamic range requirements, the integration capacitor and overall ROIC size are greatly reduced, power dissipation is decreased, and linearity is greatly improved. The end result is similar NEDT performance at higher detector and instrument temperatures. An ROIC with automatic, low-noise, in unit cell offset subtraction has been developed and demonstrated with LWIR (15 micron cutoff) HgCdTe detectors operating at 67K. The offset, which is 20X the desired signal, is subtracted in less than 10 ms with better than 99% accuracy. The subtraction current drift is less than 0.0015%/s.
CMOS image sensors offer over the standard and ubiquitous charge-coupled devices several advantages, in terms of power consumption, miniaturization, on-chip integration of analog- to-digital converters and signal processing for dedicated functionality. Due to the typically higher readout noise of CMOS cameras compared to CCD cameras applications demanding ultimate sensitivity were so far not accessible to CMOS cameras. This paper present an analysis of major noise sources, concepts to reduce them, and results obtained ona single chip digital camera with a QCIF resolution of 144 by 176 pixels and a dynamic range in excess of 120 dB.
This article presents the design and realization of a CMOS digital image sensor optimized for button-battery powered applications. First, a pixel with local analog memory was designed, allowing efficient sensor global shutter operation. The exposure time becomes independent on the readout speed and a lower readout frequency can be used without causing image distortion. Second, a multi-path readout architecture was developed, allowing an efficient use of the power consumption in sub-sampling modes. These techniques were integrated in a 0.5 um CMOS digital image senor with a resolution of 648 by 648 pixels. The peak supply current is 7 mA for a readout frequency of 4 Mpixel/s at Vdd equals 3V. Die size is 55 mm2 and overall SNR is 55 dB. The global shutter performance was demonstrated by acquiring pictures of fast moving objects without observing any distortion, even at a low readout frequency of 4 MHz.
An active pixel sensor array (APS) with programmable resolution was realized in standard 0.5 micrometers CMOS technology. For operation under poor lighting conditions, the change of sub-regions of 2 by 2 respectively 4 by 4 pixels can be summed, yielding a corresponding sensitivity enhancement. In that way the maximum resolution of 1024 by 1024 can be reduced to 512 by 512 or 256 by 256. Based on a charge skimming mechanism, the required circuitry can be implemented in any logic CMOS technology without process modifications. Output through 1, 2 or 4 analog channels clocked at a pixel at up to 40 MHz each allows a frame rate up to 160 frames/sec at an overall power dissipation of 70 mW.
A new generation of smart pixels, so-called demodulation or lock-in pixels is introduced in this paper. These devices are capable of measuring phase, amplitude and offset of modulated light up to some tens of MHz, making them ideally suited to be used as receivers in 3D time-of-flight (TOF) distance measurement systems. Different architectures of such devices are presented and their specific advantages and disadvantages are discussed. Furthermore, a simple model is introduced giving the shot noise limited range resolution of a range camera working with these demodulation pixels. Finally, a complete TOF range camera based on an array of one of the new lock-in pixels will be described. This TOF- camera uses only standard components and does not need any mechanically scanning parts. With this camera non- cooperative targets can be measured with a few centimeters resolution over a distance of up to 20 meters.
Standard CMOS technologies offer great flexibility in the design of image sensors, which is a big advantage especially for high framerate system. For this application we have integrated an active pixel sensor with 256 X 256 pixel using a standard 0.5 micrometers CMOS technologies. With 16 analog outputs and a clockrate of 25-30 MHz per output, a continuous framerate of more than 50000 Hz is achieved. A global synchronous shutter is provided, but it required a more complex pixel circuit of five transistors and a special pixel layout to get a good optical fill factor. The active area of the photodiode is 9 X 9 micrometers . These square diodes are arranged in a chess pattern, while the remaining space is used for the electronic circuit. FIll factor is nearly 50 percent. The sensor is embedded in a high-speed camera system with 16 ADCs, 256Mbyte dynamic RAM, FPGAs for high-speed real time image processing, and a PC for user interface, data archive and network operation. Fixed pattern noise, which is always a problem of CMOS sensor, and the mismatching of the 16 analog channels is removed by a pixelwise gain-offset correction. After this, the chess pattern requires a reconstruction of all the 'missing' pixels, which can be done by a special edge sensitive algorithm. So a high quality 512 X 256 image with low remaining noise can be displayed. Sensor, architecture and processing are also suitable for color imaging.