Accurate prediction of resist profile has become more important as technology node shrinks. Non-ideal resist profiles due to low image contrast and small depth of focus affect etch resistance and post-etch result. Therefore, accurate prediction of resist profile is important in lithographic hotspot verification. Standard approaches based on a single- or multiple-2D image simulation are not accurate, and rigorous resist simulation is too time consuming to apply to full-chip. We propose a new approach of resist profile modeling through machine learning (ML) technique. A position of interest are characterized by some geometric and optical parameters extracted from surroundings near the position. The parameters are then submitted to an artificial neural network (ANN) that outputs predicted value of resist height. The new resist 3D model is implemented in commercial OPC tool and demonstrated using 10nm technology metal layer.
Conventional via patterning which relies on immersion ArF (iArF) lithography and self-aligned via (SAV) becomes
challenging in sub-7nm technology. EUV lithography (EUVL) is expected to achieve smaller feature
patterning thanks to its short wave length, but edge placement error (EPE) margin remains as another bottleneck
of pitch scaling; SAV can be aligned with metal on the top but not with the bottom of the via. Literary
study shows previous work on 2D self-aligned via (2D SAV) which can be aligned with the both metals, but it
cannot extend technology scaling beyond sub-5nm whose minimum metal pitch is expected as sub-20nm due to
essential limitation of EPE margin. We propose large marginal 2D SAV which has three times large EPE margin
than normal 2D SAV for extremely shrunk technology node (e.g. sub-5nm). Large marginal 2D SAV may allow
further feature size scaling, but it requires four EUV masks. Therefore, we present two count reduction methods
and corresponding mask decompositions and pattern re-targetings. Proposed re-targeted patterns are assessed
by source mask optimization (SMO) in terms of maximum EPE and process variation band (PVB) width.
EUV lithography (EUVL) is rising up as a solution of sub-10nm technology node via patterning. Due to better resolution of EUVL than it of immersion ArF (iArF) lithography, multiple iArF masks can be replaced by one EUV mask. However, for 24nm by 24nm metal grid, two diagonally neighboring vias yield either contour of two holes or peanut-shape contour. Because of the large variability of the via contours, the two vias are separably patterned with two different masks. We propose to insert bridge patterns (BPs) at the middle of the diagonally neighboring vias, so that single EUV exposure can draw peanut-shape contour consistently. In this study, we also assume 2D self-aligned via (2D SAV) which can align via holes in both vertical and horizontal direction for better edge placement error margin, so unique re-targeted via patterns that is called bridged via (BV) appears. We investigate impact of BV size and BP shapes on simulated contour using source mask optimization, and popular BVs are compared in terms of probability of failure which are calculated with Monte-Carlo simulation.
With shrinking feature size, runtime has become a limitation of model-based OPC (MB-OPC). A few machine learning-guided OPC (ML-OPC) have been studied as candidates for next-generation OPC, but they all employ too many parameters (e.g. local densities), which set their own limitations. We propose to use basis functions of polar Fourier transform (PFT) as parameters of ML-OPC. Since PFT functions are orthogonal each other and well reflect light phenomena, the number of parameters can significantly be reduced without loss of OPC accuracy. Experiments demonstrate that our new ML-OPC achieves 80% reduction in OPC time and 35% reduction in the error of predicted mask bias when compared to conventional ML-OPC.