Etch process is critical to CD control in patterning, but Etch-aware OPC is not as accurate as lithographyaware OPC. Etch process is not understood very well compared to lithography, so empirical etch model like Variable Etch Bias (VEB) has been used for OPC. Although VEB has been quite successful so far, accuracy of etch model needs be improved with below 10 nm node devices. Machine Learning (ML) is applied in this work for VEB model improvement. However, ML is also an extreme empirical model, in fact, so over-fitting is a big problem with machine learning. We demonstrate over-fitting as well as accuracy can be improved in this work as presenting specific methods of ML such as double-stage machine learning, etch-relevant inputs and ensuring sample-coverage.
Various multi-patterning processes with associated design methodologies have been deployed to address patterning challenges of ArFi and alternate solutions such as EUV, DSA or nanoimprint. Process variability prediction through compact models is sometimes limited to those multipatterning processes used to compose single final target. We may call those sequential processes as representative module for design target layer which is not clearly derived from single litho-etch process but derived from the interaction between various layers. Key challenges for extending multiple pattering are managing design and tolerance variation in multiple pattering steps with proper restrictions, and visualizing interlayer errors (w/ bridge & pinch and overlap). Additionally,visualization of final target layers and intermediate layers is important for process/design engineers.
We will demonstrate verification flows for different process modules to verify the failure mechanisms and to aid in visualization, then judge the areas for improvement with existing model based solutions. Then we will also try to investigate possible area for development of accurate residual error prediction from compact models as those errors are accumulated from multiple process effects into final CD measurement from design target layers. This may lead to new dimensions of modeling process effects we’ve never considered because those signatures were lumped between processes to processes.
Self-Aligned Via (SAV) process is commonly used in back end of line (BEOL) patterning. As the technology node advances, tightening CD and overlay specs require continuous improvement in model accuracy of the SAV process. Traditional single layer Variable Etch Bias (VEB) model is capable of describing the micro-loading and aperture effects associated with the reactive ion etch (RIE), but it does not include effects from under layers. For the SAV etch, a multi-layer VEB model is needed to account for the etch restriction from metal trenches. In this study, we characterize via post-etch dimensions through pitch and through metal trench widths, and show that VEB model prediction accuracy for SAV CDs after SAV formation can be significantly improved by applying a multi-layer scheme. Using a multi-layer VEB, it is demonstrated that the output via size changes with varying trench dimensions, which matches the silicon results. The model also reports via shape post-etch as a function of trench environment, where elliptical vias are correctly produced. The multi-layer VEB model can be applied both multi-layer correction and verification in full chip flow. This paper will also suggest that the multi-layer VEB model can be used in other FEOL layers with interlayer etch process effects, such as gate cut, to support the robustness of new model.
For more than five decades, the semiconductor industry has overcome technology challenges with innovative ideas that have continued to enable Moore’s Law. It is clear that multi-patterning lithography is vital for 20nm half pitch using 193i. Multi-patterning exposure sequences and pattern multiplication processes can create complicated tolerance accounting due to the variability associated with the component processes. It is essential to ensure good predictive accuracy of compact etch models used in multipatterning simulation. New modelforms have been developed to account for etch bias behavior at 20 nm and below. The new modeling components show good results in terms of global fitness and some improved predication capability for specific features. We’ve also investigated a new methodology to make the etch model aware of 3D resist profiles.
Photolithography for the formerly "non-critical" implant blocking layers is becoming more challenging as edge
placement control budgets for junction definition shrink with each node. In addition to the traditional proximity
effects associated with the implant layer mask, the underlying active and gate layers can interact through a variety of
mechanisms to influence the edge placement of the developed implant layer. These mechanisms include bulk
reflectivity differences, resist thickness thin film interference effects, reflective notching from pattern sidewalls,
reflections from curved surfaces, focus differences, and more. While the use of organic developable bottom
antireflection coating (dBARC) can be effective in minimizing these influences, it does represent an added
complexity and cost, and processes are still relatively immature. Without such a dBARC, the CD variation due to
underlying layers can easily exceed 50 nm, or more than 25% of the target dimension. We propose here a
framework for modeling and correcting for these underlayer effects. The approach is based upon calibration of an
optical model representing only implant mask proximity effects and two additional optical models which represent
the effects of the underlayer topography. Such an approach can be effective in delivering much improved CD
control for complex layouts, and represents only a small impact to full-chip correction runtime.
Temporal drift in the mask manufacturing process has been observed in CD measurements collected at different times.
Most of this is corrected through global sizing and dose adjustments resulting in small mean-to-target (MTT) residual
errors. However, this procedure does not account for a detectable change in the proximity behavior of the mask
process. This paper discusses a procedure for detecting and monitoring the proximity behavior of a process using an
targeted sampling plan. It also proposes a procedure to correct for drifts in proximity behavior if it is predictable and
The challenges of ever-smaller CD (Critical Dimension) budget for advanced memory product requires tight ACLV (Across-Chip Line-width Variation) control. In addition to the lithographic MOPC (Model-based Optical Proximity Correction) for DCD (photo CD) control, the process correction for etch proximity effect can no longer be ignored. To meet on our requirement on final CD accuracy for critical layer, a set of test pattern, that represents memory array in one of our critical layers, has been generated for both photo and etch process characterizations. Through the combination of different pattern-coverage areas in the test mask and wafer map design, various local (chip-level) pattern densities of 40%~70% and global (wafer-level) pattern densities of 35%~65% were achieved for optical and etch proximity study. The key contributors to the process proximity effect were identified and voluminous data has been extracted from the memory block like patterns for statistical analysis. The photo and etch proximity effects were hence modeled as function of memory block separation, local pattern density as well as global pattern density. Finally, the respective photo and etch proximity effects through model-based proximity correction and rule-based proximity correction were applied in a multi-step flow to products.
In our previous study, we introduced the method of intensity weighting over various image planes for
FLEX (Focus Latitude Enhancement eXposure) process. By higher energy weighting on the best focus
image for the approach of triple focal plane exposure, it demonstrated higher contrast over wide focus
range than conventional FLEX, accordingly achieved the better performance on DoF (Depth of Focus), EL
(Energy Latitude), proximity and CD uniformity. However, this technique limits the production capability
by the increased number of images.
Thanks for all the technology developments on RET (Resolution Enhancement Technology) with tool
functionality, which is related to focus drilling method in scanner system. Hence there have been several
papers addressed the focus drilling technique with high frequency illumination source recently, the focus
drilling technique enables more continual image planes over focus range on advanced step and scan system
while scanning the image with single uniformity energy level over various focus ranges [2-3].
In this paper, the approach combining focus drilling with intensity weighting was introduced to strengthen
the potential of process in step and scan system. Since the hardware for focus drilling and intensity
weighting is not available in our study, we've only demonstrated the technical concepts through simulation
by Prolith Ver. 9.31. To achieve the effect of intensity weighting on the focus range, we've been suggested
new idea of application and applied some treatment on data from simulation tool. Simulation result on
intensity weighted focus drilling achieved higher EL and DoF than the conventional focus drilling at the
same focus range.
Nowadays, RET (Resolution Enhancement Technology) is applied into lots of processes with special attention on the stage of development and manufacturing. Of the RET applications, FLEX (Focus Latitude Enhancement eXposure) [1- 2] is well known for 20 years and had shown that this method can enlarge the focus latitude on total window of DoF-EL (Depth of Focus and Exposure Latitude) through the benefit of gathering two or more exposure images with different
focus planes. In double focal exposure, only focus level with even energy separation was considered in this study, and the image contrast flattening over wide focus range and contrast value lowering were demonstrated in this study by simulation. The lowering contrast level directly affects on physical resolution capability and proximity. But the area that is used to be a low contrast in single exposure has gained benefit from the image super-position, hence the variation of contrast over focus is much smaller by double focal exposure and wider DoF is achieved. As for triple image plane
process, the process selections are more versatile than single and double exposure; for example, we can even superpose the images with different energy distributions. In this paper, several image plane combinations were first reviewed by contrast level and contrast variation through normalized focus by simulation for optimizing the process condition, and then experimental verifications were also carried out to compare the lithographic parameters, such as, depth of focus, exposure latitude, CD controllability and mask error enhancement factor, for our interesting 1-D contact.