Extreme ultraviolet lithography (EUVL) tool development achieved a big milestone last year as two full-field
Alpha Demo Tools (ADT) were shipped to customers by ASML. In the future horizon, a full field "EUV1" exposure
tool from Nikon will be available by the end of 20071 and the pre-production EUV exposure tools from ASML are
targeted for 20092. It is essential that high quality EUVL masks can be made and delivered to the EUVL tool users to
support the technology development. In the past year, we have demonstrated mask fabrication with low stress absorber
deposition and good etch process control yielding a vertical etch profile and a mask CD control of 5.7 nm for 32 nm (1x)
space and 7.4 nm for 32 nm (1x) lines. Mask pattern resolution of 15 nm (1x) dense lines was achieved. Full field
reflective mask die-to-die inspection at a 125nm pixel size was demonstrated after low defect multilayer blanks became
In this paper, we will present details of the Intel EUVL Mask Pilot Line progress in EUVL mask defect reduction,
pattern CD performance, program defect mask design and inspection, in-house absorber film development and its
performance, and EUVL metrology tool development. We will demonstrate an overall improvement in EUV mask
manufacturing readiness due to our Pilot Line activities.
Evaluation of lithography process or stepper involves very large quantity of CD measurements and measurement
time. In this paper, we report on a application of Scatterometry based metrology for evaluation of binary photomask
lithography. Measurements were made on mask level with ODP scatterometer then on wafer with CD-SEM. 4 to 1
scaling from mask to wafer means 60nm line on wafer translates to 240nm on mask, easily measurable on ODP.
Calculation of scatterometer profile information was performed by a in-situ library-based analysis (5sec/site). We
characterized the CD uniformity, linearity, and metal film thickness uniformity. Results show that linearity measured
from fixed-pitch, varying line/space ratio targets show good correlation to top-down CD-SEM with R2 of more than
0.99. ODP-SEM correlation results for variable pitch shows that careful examination of scatterometer profile results in
order to obtain better correlation to CD SEM, since both tools react differently to the target profile variation. ODP
results show that global CD distribution is clearly measurable with less outliers compared to CD SEM data. This is
thought to be due to 'averaging' effect of scatterometer. The data show that Scatterometry provides a nondestructive and
faster mean of characterizing lithography stepper performanceprofiles. APSM 1st level (before Cr removal) 'dual-space'
CDs and EPSM rectangular contacts were also measured with and results demonstrates that Scatterometer is capable of
measuring these targets with reasonable correlation to SEM.
A significant barrier to implementing APSM in volume production has been the expense of the mask. The cost of the
mask is driven partially by the complexity of the two layer process flow required to make the mask. Typically, the 2nd
level pattern is generated by upsizing the first level pattern of the pi apertures by a small amount in order to provide
some overlay margin. The amount of upsizing is limited by the smallest chrome feature present in the pattern. The
overlay margin between the first and 2nd level patterns can be improved by sizing the 2nd level more on larger chrome
structures, when present. With a simple set of rules, it is possible to generate a 2nd level pattern with greater than ten
times reduction in the number of corners, as measured by the number of vertices in the pattern, and minimize the number
of marginal patterns in the design. This also has the beneficial side effect of significantly reducing the file size of the 2nd
level pattern which can reduce the write time on some writers. Existing design rules can be exploited or additional rules
imposed that can further improve the capability of the 2nd level APSM process. The right set of mask design rules can
enable the use of lower fidelity writer for 2nd level patterning which can significantly reduce cost. The improved margin
can increase yield and may even enable a less capable/expensive patterning tool to be used for 2nd level patterning.
In this paper, we report on a Scatterometry based metrology system that provides line width, line thickness, and
trench depth measurements on APSM and EPSM photomasks. Measurements were made with scatterometer in DUV to
visual wavelength range. Calculation of profile information was performed by a library-based analysis software. We
characterized the CD uniformity, linearity, trench depth uniformity. Results show that linearity measured from fixed-pitch,
varying line/space ratio targets show good correlation to top-down CD-SEM with R2 of more than 0.99. EPSM
FCCD data was obtained from both scatterometer and CDSEM. Results show that MEEF calculation based on
scatterometer CD shows about 40% improvement in removing mask-induced CD non-uniformity, compared to
calculation based on CD SEM data. This is thought to be due to 'averaging' effect of scatterometer. Depth measurements
from APSM show that scatterometer makes good correlations to AFM, generally within 3nm of each other. The data
show that Scatterometry provides a nondestructive means of monitoring PSM profiles combined with relatively little
Alternating Phase Shift Mask (APSM) Technology has been developed and successfully implemented for the poly gate of 65nm node Logic application at Intel. This paper discusses the optimization of the mask design rules and fabrication process in order to enable high volume manufacturability. Intel's APSM technology is based on a dual sided trenched architecture. To meet the stringent OPC requirements associated with patterning of narrow gates required for the 65nm node, Chrome width between the Zero and Pi aperture need to be minimized. Additionally, APSM lithography has an inherently low MEEF that furthermore, drives a narrower Chrome line as compared to the Binary approach. The double sided trenched structure with narrow Chrome lines are mechanically vulnerable and prone to damage when exposed to conventional mask processing steps. Therefore, new processing approaches were developed to minimize the damage to the patterned mask features. For example, cleaning processes were optimized to minimize Chrome & quartz damage while retaining the cleaning effectiveness. In addition, mask design rules were developed which ensured manufacturability. The narrow Chrome regions between the zero and Pi apertures severely restrict the tolerance for the placement of the second level resists edges with respect to the first level. UV Laser Writer based resist patterning capability, capable of providing the required Overlay tolerance, was developed, An AIMS based methodology was used to optimize the undercut and minimize the aerial image CD difference between the Zero and Pi apertures.
Alternating phase shift mask (APSM) techniques help bridge the significant gap between the lithography wavelength and the patterning of minimum features, specifically, the poly line of 35 nm gate length (1x) in Intel's 65 nm technology. One of key steps in making APSM mask is to pattern to within the design tolerances the 2nd level resist so that the zero-phase apertures will be protected by the resist and the pi-phase apertures will be wide open for quartz etch. The ability to align the 2nd level to the 1st level binary pattern, i.e. the 2nd level overlay capability is very important, so is the capability of measuring the overlay accurately. Poor overlay could cause so-called the encroachment after quartz etch, producing undesired quartz bumps in the pi-apertures or quartz pits in the zero-apertures. In this paper, a simple, low-cost optical setup for the 2nd level DC (develop check) overlay measurements in the high volume manufacturing (HVM) of APSM masks is presented. By removing systematic errors in overlay associated with TIS and MIS (tool-induced shift and Mask-process induced shift), it is shown that this setup is capable of supporting the measurement of DC overlay with a tolerance as small as +/- 25 nm. The outstanding issues, such as DC overlay error component analysis, DC - FC (final check) overlay correlation and the overlay linearity (periphery vs. indie), are discussed.
Phase shift mask (PSM) applications are becoming essential for addressing the lithography requirements of the 65 nm technology node and beyond. Many mask writer properties must be under control to expose the second level of advanced PSM: second level alignment system accuracy, resolution, pattern fidelity, critical dimension (CD) uniformity and registration. Optical mask writers have the advantage of process simplicity for this application, as they do not require a discharge layer. This paper discusses how the mask writer properties affect the error budget for printing the second level. A deep ultraviolet (DUV) mask writer with a spatial light modulator (SLM) is used in the experimental part of the paper. Partially coherent imaging optics at the 248 nm wavelength provide improved resolution over previous systems, and pattern fidelity is optimized by a real-time corner enhancement function. Lithographic performance is compared to the requirements for second level exposure of advanced PSM. The results indicate sufficient capability and stability for 2nd level alternating PSM patterning at the 65 nm and 45 nm nodes.