Spin coating has been used as a photoresist application method for many years, and consequently certain defects have been recognized through each resist generation; i-line, KrF, ArF, ArF immersion and, most recently, EUV. Last year we reported an in-situ analysis via high-speed video camera that proved to be useful for understanding defect formation such as non-uniformity spots within organic film coatings and post-develop water-mark defects. In this study, fingerprints known as ‘tiger stripes’ around the wafer’s edge were analyzed. This phenomenon, for example, is directly related to the wafer spin-speed and air-flow during the coat-processing.
Utilizing a high-speed camera and 3D simulation, we reveal the mechanism of fingerprint generation for tiger stripe phenomena, confirm the mechanism with several different spin-speeds, and correlate these to defect inspection results. Furthermore, we will discuss the expansion to 450mmm wafers.
EUV lithography (EUVL) is well known to be a strong candidate for next generation, single exposure sub-30nm half-pitch lithography.<sup> </sup>Furthermore, a high-NA EUV exposure tool released two years ago gave a strong impression for finer pattern results. On one hand, it seems that the coat develop track process remains very similar and in many aspects returns to KrF or ArF dry process fundamentals, but in practice the 26-32nm pitch patterning coat-develop track process also has challenges with EUV resist. As access to EUV lithography exposures has become more readily available over the last five (5) years, several challenges and accomplishments in the track process have been reported, such as the improvement of ultra-thin film coating, CD uniformity, defectivity, line width roughness (LWR) and so on.<sup>[2-6]</sup> The coat-develop track process has evolved along with novel materials and metrology capability improvements. Line width roughness (LWR) and defect control are demonstrated utilizing the SOKUDO DUO coat-develop track system with an ASML NXE:3100 in the IMEC (Leuven, Belgium) clean room environment. Additionally, we will show the latest lithographic results obtained by novel processing approaches in an EUV coat-develop track system.
EUV lithography (EUVL) is well known to be a strong candidate for next generation, single exposure, sub-30nm half-pitch lithography. Much progress relevant to EUVL has been reported for a decade, however, many issues continue to challenge implementation for volume production.<sup>[1,2]</sup> On the other hand, it seems that the coat develop track process remains very similar and in many aspects returns to KrF or ArF dry process fundamentals, but in practice 26-32nm pitch patterning coat develop track process also has challenges with EUV resist. As access to EUV lithography exposures has become more readily available over the last five (5) years, several challenges and accomplishments in track processing have been reported, such as the improvement of ultra-thin film coating, CD uniformity, defectivity, line width roughness (LWR), and so on.<sup>[3,4,5,6]</sup> The coat-develop track process has evolved along with novel materials and metrology capability improvements. By coating ultra-thin under layers and resist films and by controlling resist dissolution, the SOKUDO DUO coat develop track system at IMEC (Leuven, Belgium), with ASML NXE3100 exposure, has been used to demonstrate improved CD uniformity, LWR, and defect control. Additionally, we will show the latest lithographic results obtained by novel processing approaches in EUV coat develop track system.
Typical defects to be resolved during coat-develop track processing have been confirmed during each resist generation; I-line, KrF, ArF, ArF immersion, and recently EUVV.[1-5] In this study, two types of defect formation were analyzed: organic film post coating non-uniformity spots and post develop water-marks. During substrate rotation,, a high-speed video camera is used to observe characteristic phenomena which lead to the generation of these rather typical defects. Post coating non-uniformity defects were linked to bubble formation, and post develop defects were associated with thee wafer drying conditions. By correlating high-speed camera images and defect inspection results from several different resists we can disclose the defect generation mechanism of multiple typical phenomena.
EUV lithography (EUVL) is the leading candidate for the manufacture of devices with 1× nm node and beyond.
However, many challenges remain for the industry to understand clearly and to overcome before EUVL will be ready for
application in volume production. Efforts have been made to improve the various critical components of EUVL, such as
light source, exposure tool, mask, resist material, and so on.<sup>[1,2]</sup> Among these, resist materials are considered as one of the most critical issues in realizing EUVL.<sup>[3,4]</sup> Coat-develop track system overcame several challenges for each traditional resist system (i.e. i-line, KrF ArF, and ArF immersion). EUV resist system requires ultra thin organic film coating.<sup></sup> The under-layer thickness is below 10nm and the resist thickness is about 40nm, however, in some cases film thickness is smaller than the diameter of particles on the substrate, even if the particle size is smaller than the detection limit of defect inspection tool. Also EUV resist patterning becomes extremely small pattern pitch. It leads the difficulty of CD control because the resist solubility in develop processing depends on resist type. Some resists were significantly swelled during develop process. Swelling depends on develop time and developer materials. That behavior on EUV resist system is becoming evident.<sup></sup> Furthermore, LWR
improvement on track processing is required. During the conference, we will discuss how to coat the substrate with ultra thin film and how to control resist dissolution to improve CD uniformity and LWR. Additionally, we will show the latest lithographic results obtained with the novel application for EUV coat-develop track system.
A baseline coat-develop track process has been established for inorganic EUV resists. Inorganic EUV resists have
already been highlighted for their higher resolution and lower Line-Width-Roughness (LWR) for lithography features as
well as strong etch resistance , , , . This inorganic resist system is not only interesting due to lithography
process capability but also do to its influences on coat-develop track processing. It is understood that this inorganic resist
system is dissolved in an aqueous solution and therefore has the different characteristics compared to typical polymer
photoresist in organic solvent.
Spin coating this aqueous resist solution leads to several challenges beyond the traditional aqueous Top Anti-Reflective
Coat (TARC) materials used decades ago. Resist spin coating systems have continuously improved over the years based
on polymer photoresists, therefore it becomes necessary to confirm if the latest coat module design and processes are
equally applicable to aqueous resists targeted for EUV lithography. Another characteristic of this inorganic system it is
not a chemical amplified resist. Post-Applied Bake (PAB), Post-Exposure Bake (PEB) and develop processes are
compared with current polymer photoresist process. In this study, a coat-develop track process baseline is established for
metrics such as film thickness uniformity, critical dimension (CD) uniformity and process defectivity. Based on this
baseline data areas for improvement in coat-develop track process are identified to enable inorganic resist transition to
volume production with EUV or E-Beam lithography.
This study reports on post-develop defect for EUV resist process. Presently, research and development of EUV resists
are continuously being carried out in terms of resolution, sensitivity, LWR. However, in the preparation of EUV
lithography for mass-production, research on the reduction of pattern defects, especially post-develop defect is also
necessary. As observed during the early stages of resist development for the various lithographic technologies, a large
number of pattern defects are commonly coming from the resist dissolution process.
As previously reported, utilizing an EUV exposure tool, we have classified several EUV specific defects on exposed and
un-exposed area. And also we have reported approaches of defect reduction.
In this work, using some types developer solution (TBAH, TBAH+, etc) comparing with current developer solution
(TMAH), EUV specific defects were evaluated. Furthermore, we investigated the defect appearing-mechanism and
approached defect reduction by track process. Finally, based on these results, the direction of defect reduction
approaches applicable for EUV resist processing was discussed.
This study reports on post develop defect on TC-less immersion resist system. There are major defects on TC-less resist
system, for example micro-Bridging, Blob and pattern collapse defect, as is well known. Among these defect, we
reported Blob and pattern collapse defect could be reduced by Acid rinse involving CO2. However, we also reported
there was the difference in the effect for each resist.
In this work, we show the great effective and slight effective case for post develop defect and we discuss the cause of
difference in acid rinse effect. We evaluated and confirmed the effect on each resist, pattern, exposed area location,
develop process and so on. Furthermore, we made a mechanism of defect appearing based on the analysis of defect
components and the measurement of resist surface condition for each develop process.
Finally we show the novel approach to post develop defect reduction on TC-less immersion resist system.
In immersion lithography process, film stacking architecture will be necessary due to film peeling. However, the
architecture will restrict lithographic area within a wafer due to top side EBR accuracy
In this paper, we report an effective film stacking architecture that also allows maximum lithographic area. This study
used a new bevel rinse system on RF3 for all materials to make suitable film stacking on the top side bevel. This
evaluation showed that the new bevel rinse system allows the maximum lithographic area and a clean wafer edge.
Patterning defects were improved with suitable film stacking.
Extremely fine hole pattern formation with dark spot image is investigated with Atten-PSM and specific modified illumination. In optical image calculation, by the application of tone reversed image in Atten-PSM under an optimized cross-pole illumination, dark spot image with zero MEF and iso-focal characteristics is obtained for very wide range of pattern pitch. In KrF wavelength, formation of ~110 nm size dark spot image with resolution DOF higher than ~0.50μm can be achieved for the pattern pitch of isolated to ~240 nm. In this imaging, MEF may become very low or exactly zero for the pitch of isolated to ~300 nm. Because of low or zero MEF, OPC is essentially difficult or may be performed imperfectly for this method. However, small OPE of ~10 nm in CD variation throughout pattern pitch could be expected by the application of optimized illumination. In preliminary experiments under KrF optics of NA=0.75, high DOF and zero MEF characteristics are successfully proven, even while the experiments are carried out with non-optimal modified illumination.
Sub-100 nm line pattern is easily formed with DOF larger than 0.9 micrometer by mature lithography technology in KrF wavelength. It is discovered by optical image calculations that a dark mask line between two bright mask lines with each dimensions of 0.20 to approximately 0.14 micrometer (measured on wafer scale) can be imaged with very fine width under a modified illumination. Also, at some conditions, iso-focal CD characteristics are observed for the very fine line image. The validity of this calculated characteristics is confirmed by experiments. The fine dark line pattern with the width finer than 100 nm is formed by the application of the image generated by this method. Moreover, the patterns formed by this method show high exposure latitude, low MEF and high immunity to lens aberration.