Earlier [1, 2] work highlighted an integrated process for electrically functional 12 nm half-pitch copper interconnects in an ultralow-k interlayer dielectric (ILD). In this paper, we focus on understanding and reducing undesired effects such as pattern asymmetry/distortion, and line undulation/ collapse. Key defect modes and possible solution paths are discussed. Line undulation can occur when the ILD feature changes shape under the stress of the sacrificial hard mask(s) (HM) during patterning, resulting in “wavy” instead of straight features. The amount of undulation is directly related to mechanical properties such as elastic modulus, residual stresses of patterned HMs and the ILD, as well as the dimensions and aspect ratio of the features. Line collapse is observed post wet-clean processing when one or more of the following is true - Insufficient ILD mechanical strength, excessive pattern aspect ratio, or non-uniform drying. Pattern asymmetry, or unequal critical dimensions (CD) of trenches defined by the same backbone, is a typical problem encountered during spacer-based pitch division. In pitch quartering (P/4), three different trench widths result from small variations in backbone lithography, spacer CD and etch bias. Symmetric patterning can be achieved through rigorous control of patterning processes like backbone definition, spacer deposition and downstream etches. Plasma-based ash and energetic metal deposition were also observed to degrade patterning fidelity of ultra low-k film, and also need to be closely managed.
A novel approach to three-dimensionally (3-D) integrate nanophotonic and electronic devices in silicon is described. The method is based on the SIMOX (Separation by Implantation of OXygen) process, to realize three-dimensionally (3-D) integrated devices in a monolithic fashion. In this approach, photonic and electronic devices are realized on vertically stacked layers of silicon, separated from each other by a dielectric layer of silicon dioxide formed through the process of oxygen implantation. Opto-electronic integration is demonstrated by realizing photonic circuits in a subterranean silicon layer and Metal-Oxide-Semiconductor (MOS) transistors on a surface layer of silicon. Optical and electronic functionalities are thus separated into two different layers of silicon, paving the way towards dense three-dimensional opto-electronic integration. This has the significant advantage that photonic devices do not consume any of the expensive silicon real estate required for CMOS circuitry. The versatility of the technique of SIMOX 3-D sculpting in obtaining complex optical circuitry is also demonstrated by synthesizing a cascaded microdisk structure that may be utilized to tailor the passband characteristics of optical filters.
The integration of photonics and electronics on a single silicon substrate requires technologies that can add optical functionalities without significantly sacrificing valuable wafer area. To this end, we have developed an innovative fabrication process, called SIMOX 3-D Sculpting, that enables monolithic optoelectronic integration in a manner that does not compromise the economics of CMOS manufacturing. In this technique, photonic devices are realized in subsurface
silicon layers that are separated from the surface silicon layer by an intervening SiO2 layer. The surface silicon layer may then be utilized for electronic circuitry. SIMOX 3-D sculpting involves (1) the implantation of oxygen ions into a patterned silicon substrate followed by (2) high temperature anneal to create buried waveguide-based photonic devices. This process has produced subterranean microresonators with unloaded quality factors of 8000 and extinction ratios >20dB. On the surface silicon layers, MOS transistor structures have been fabricated. The small cross-sectional area of the waveguides lends itself to the realization of nonlinear optical devices. We have previously demonstrated spectral broadening and continuum generation in silicon waveguides utilizing Kerr optical nonlinearity. This may be combined with microresonator filters for on-chip supercontiuum generation and spectral carving. The monolithic integration of CMOS circuits and optical modulators with such multi-wavelength sources represent an exciting avenue
for silicon photonics.
Although the Raman effect is nearly two orders of magnitude stronger than the electronic Kerr nonlinearity in silicon, under pulsed operation regime where the pulse width is shorter than the phonon response time, Raman effect is suppressed and Kerr nonlinearity dominates. Continuum generation, made possible by the non-resonant Kerr nonlinearity, offers a technologically and economically appealing path to WDM communication at the inter-chip or intra-chip levels. We have studied this phenomenon experimentally and theoretically. Experimentally, a 2 fold spectral broadening is obtained by launching ~4ps optical pulses with 2.2GW/cm2 peak power into a conventional silicon waveguide. Theoretical calculations, that include the effect of two-photon-absorption, free carrier absorption and refractive index change indicate that up to >30 times spectral broadening is achievable in an optimized device. The broadening is due to self phase modulation and saturates due to two photon absorption. Additionally, we find that free carrier dynamics also contributes to the spectral broadening and cause the overall spectrum to be asymmetric with respect to the pump wavelength.
A new process has been developed to create vertically-integrated photonic and optoelectronic circuits in silicon. The approach is the 3-D extension of the SIMOX process where buried SiO2 sections can be selectively created by using oxygen implantation, through a mask, followed by annealing. By controlling the implant energy, dose, mask area and thickness, arbitrary 3-D arrangements of Silicon/SiO2 can be created. The process has been used to create vertically coupled microdisk resonators and add-drop wavelength multiplexers on a silicon wafer.