Ion implantation (I/I) and annealing techniques to enable high carrier doping into selected regions are one of important research fields for realization of GaN power devices. However, particularly difficult research challenges are present in Mg-I/I into GaN as p-type doping technique. First problem is related to nitrogen vacancies (VN), crystal defects introduced by Mg-I/I .  Second issue is connected to degeneration of GaN surface by pyrolysis reaction during high-temperature annealing process. We examined Mg/N co-implantation into GaN as p-doping in order to compensate of VN defects. Research on ultra-high pressure thermal activation process to maintain equilibrium conditions at high temperature was conducted to avoid degradation of GaN surface.
We prepared Mg/N co-implanted GaN-on-GaN samples with 300-nm-deep Mg-box-profile of 1E19 cm-3 and with N-box-profile of various concentrations in the range 0 ~ 1E20 cm-3. The samples were annealed without a protection cap layer at temperature between 1300 °C and 1480 °C under 1 GPa in N2 atmosphere. Samples capped with sputter-AlN were treated by conventional lamp annealing at 1300 °C for a comparison purpose.
We obtained the dominant Green Luminescence (GL) emission at 2.3 eV and the recessive Donor Acceptor Pair (DAP) emission at 3.2 eV from a low-temperature cathodoluminescence (LT-CL) spectra in Mg-I/I samples without N co-implantation. This is in good agreement with results published before. In addition to this, we found that the Mg/N co-implantation, for optimized N-ion dose, suppresses the GL intensity while maintaining the DAP intensity. Furthermore, in the ultra-high pressure thermal activation process, the DAP intensity markedly increases with anneal temperature and GL intensity suppression is also visible. These results strongly suggest that the origin of GL is related to VN, and the VN defect compensation occurs by N co-implantation. We also compare the AFM images of GaN surface roughness. The ultra-high pressure annealed surfaces were as smooth (RMS = 0.2~0.3 nm) as the as-implanted samples (0.3 nm), whereas surface treated with conventional lamp was rough (1.9 nm).
We can, therefore, conclude that Mg/N co-implantation and ultra-high pressure thermal activation process allows activation of the Mg acceptor and recovery of p-GaN crystal quality. Such treatment results in VN defect compensation and a smooth surface of the annealed sample.
This work was supported by MEXT “Program for research and development of next-generation semiconductor to realize energy-saving society.”
 A. Uedono et al., Phys. Status Solidi B 252, No. 12 (2015)
 K. Kojima et al., Appl. Phys. Express 10, 061002 (2017).
Vertical GaN power devices have become recognized as a strong candidate of high power devices because several reports having over 1kV breakdown voltage and low on-resistance have been published. However, these data still include some issues to be solved for practical applications. A merit of GaN is potential of high channel mobility which results in low on-resistance compared with SiC. Therefore, channel structure having high channel mobility is essential for vertical GaN devices. Most useful property of GaN for high channel mobility is that AlGaN/GaN heterostructure can be used. Panasonic Group developed high performance vertical GaN device with 1.7kV withstand voltage and 1mΩcm2 on resistance in 2016. The device had an AlGaN / GaN channel with a p-GaN gate of which channel mobility was 500-1000cm2/Vs. This performance is beyond the performance of SiC-MOSFET for the first time. Though AlGaN/GaN channel is ideal as high mobility channel, it, however, is difficult to fabricate the normally-off channel with high threshold voltage. If conventional MOS channel is possible, simple structure normally-off with high threshold voltage will be possible. In recent years, a high channel mobility exceeding 100 cm2/Vs of MOS channel has been reported by the two groups. Fuji Electric Group showed high mobility of 120 cm2/Vs in the inverted channel of the MOSFET in 2017. And UC Davis group reported 185 cm2/Vs with a GaN channel regrown on the trench sidewall in the trench gate MOSFET in 2017. These data make the expectation of the possibility of higher channel mobility of MOS structure by improving the interface state.
Over the past decade, the performance of GaN power devices has rapidly improved. There are two types of devices currently being developed, with either a lateral or a vertical structure. Though mainstream GaN power devices have still a lateral structure, vertical structure devices that is on GaN power devices have recently attracted additional research attention. The vertical structure has the advantages of a small chip size, easy wiring, a high breakdown voltage, and current-collapse-free operation. These characteristics are highly suited for high-power applications, for example, to control high-power motors used in electric automobiles.
Though recent reports showed high performance of the vertical structure, the development issues of the fabrication process still remain. The main issue is the quality of GaN substrates. Recent substrates have sufficient quality for high-voltage experiments like fabricating high-voltage devices, which make possible to obtain high-voltage devices over 1kV. However, the entire GaN substrate area does not yet have a uniform quality. It is the large issue. Other important issue is a normally-off gate structure and the gate insulator. Gate structure of the threshold voltage of > 3V like inverted type gate must be developed. The gate insulator which has low interface state density and high reliability is also required. Progress of the gate insulator is very rapid and low interface state density was established using SiO2 and resulted in the inverted MOSFET operation. The recent progress of the on GaN power devices will inspire the researches more.