Dr. Tetsuaki Matsunawa
Research Engineer at Toshiba Memory Corp
SPIE Involvement:
Author
Publications (20)

Proceedings Article | 23 March 2020 Presentation + Paper
Proceedings Volume 11327, 113270H (2020) https://doi.org/10.1117/12.2551859
KEYWORDS: Convolution, Photomasks, Lithography, Inverse problems, Statistical modeling

Proceedings Article | 20 March 2019 Paper
Proceedings Volume 10962, 109620T (2019) https://doi.org/10.1117/12.2515665
KEYWORDS: Semiconducting wafers, Critical dimension metrology, Image classification, Photomasks, System on a chip, Convolution, Wafer inspection

Proceedings Article | 20 March 2019 Paper
Proceedings Volume 10962, 109620Q (2019) https://doi.org/10.1117/12.2515664
KEYWORDS: Lithography, Machine learning, Semiconducting wafers, System on a chip, Photomasks, Optical proximity correction, Etching, Manufacturing, Performance modeling, Convolution

Proceedings Article | 12 October 2018 Presentation
Proceedings Volume 10810, 1081006 (2018) https://doi.org/10.1117/12.2503462
KEYWORDS: Machine learning, Design for manufacturing, Statistical modeling, SRAF, Lithography

Proceedings Article | 13 July 2017 Paper
Proceedings Volume 10454, 104540I (2017) https://doi.org/10.1117/12.2279780
KEYWORDS: Convolutional neural networks, Semiconductor manufacturing, Lithography, Neural networks

Showing 5 of 20 publications
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