Tho L. La
Product Yield Enhancement Engineer at Xilinx Inc
SPIE Involvement:
Author
Publications (1)

Proceedings Article | 23 September 2009 Paper
Tho La, Xiao-Yu Li, Charles Chen, M. Wang, Chih-Chung Huang, Ching-Tsai Chang, Hornjaan Lin, Yming Tseng, Ian Tseng, You Wu, Shih Chieh Lo, Sam Lin
Proceedings Volume 7488, 74883N (2009) https://doi.org/10.1117/12.829744
KEYWORDS: Field programmable gate arrays, Critical dimension metrology, Semiconducting wafers, Yield improvement, Reticles, Patents, Lanthanum, Lithium, Transistors, Optimization (mathematics)

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