The feasibility of measuring overlay using small targets has been demonstrated in an earlier paper1. If the target is small ("smallness" being relative to the resolution of the imaging tool) then only the symmetry of its image changes with overlay offset. For our purposes the targets must be less than 5μm across, but ideally much smaller, so that they can be positioned within the active areas of real devices. These targets allow overlay variation to be tested in ways that are not possible using larger conventional target designs. In this paper we describe continued development of this technology.
In our previous experimental work the targets were limited to relatively large sizes (3x3μm) by the available process tools. In this paper we report experimental results from smaller targets (down to 1x1μm) fabricated using an e-beam writer.
We compare experimental results for the change of image asymmetry of these targets with overlay offset and with modeled simulations. The image of the targets depends on film properties and their design should be optimized to provide the maximum variation of image symmetry with overlay offset. Implementation of this technology on product wafers will be simplified by using an image model to optimize the target design for specific process layers. Our results show the necessary good agreement between experimental data and the model.
The determination of asymmetry from the images of targets as small as 1μm allows the measurement of overlay with total measurement uncertainty as low as 2nm.
Currently, overlay measurements are characterized by “recipe”, which defines both physical parameters such as focus, illumination et cetera, and also the software parameters such as algorithm to be used and regions of interest. Setting up these recipes requires both engineering time and wafer availability on an overlay tool, so reducing these requirements will result in higher tool productivity.
One of the significant challenges to automating this process is that the parameters are highly and complexly correlated. At the same time, a high level of traceability and transparency is required in the recipe creation process, so a technique that maintains its decisions in terms of well defined physical parameters is desirable. Running time should be short, given the system (automatic recipe creation) is being implemented to reduce overheads. Finally, a failure of the system to determine acceptable parameters should be obvious, so a certainty metric is also desirable. The complex, nonlinear interactions make solution by an expert system difficult at best, especially in the verification of the resulting decision network. The transparency requirements tend to preclude classical neural networks and similar techniques. Genetic algorithms and other “global minimization” techniques require too much computational power (given system footprint and cost requirements). A Bayesian network, however, provides a solution to these requirements. Such a network, with appropriate priors, can be used during recipe creation / optimization not just to select a good set of parameters, but also to guide the direction of search, by evaluating the network state while only incomplete information is available. As a Bayesian network maintains an estimate of the probability distribution of nodal values, a maximum-entropy approach can be utilized to obtain a working recipe in a minimum or near-minimum number of steps. In this paper we discuss the potential use of a Bayesian network in such a capacity, reducing the amount of engineering intervention. We discuss the benefits of this approach, especially improved repeatability and traceability of the learning process, and quantification of uncertainty in decisions made. We also consider the problems associated with this approach, especially in detailed construction of network topology, validation of the Bayesian network and the recipes it generates, and issues arising from the integration of a Bayesian network with a complex multithreaded application; these primarily relate to maintaining Bayesian network and system architecture integrity.
Pattern matching has long been a cornerstone of industrial inspection. For example, in order to obtain high accuracy, modern overlay metrology tool optics are optimized to ensure symmetry around the central axis. To obtain best performance, the metrology target should be as close as possible to that axis, hence a pattern recognition stage is usually used to verify target position before measurement. However most of the work performed to date has concentrated on situations where the imaging process could be described by simple ray-tracing, where the image is formed by albedo difference between surfaces rather than interference. However, current semiconductor technology requires optical identification of targets less than 30 microns (i.e. about 50 wavelengths) across, and of order 1 wavelength deep, and this description is no longer valid; interference and focusing effects become dominant. In this paper we examine these effects, and their impact on a number of different techniques. We compare image-based and CAD-derived models in the training of the pattern recognition system; CAD-derived models are of particular interest due to their use in “imageless” recipe creation techniques. Our chief metrics are precision and reliability. We show that for both types of pattern matching approach, submicron precision and high reliability is achievable even in very challenging optical environments. We show that, while generally inferior to image based models, that models derived from design data are more robust to changes caused by process variation, namely changes in illumination, contrast and focus.
Overlay metrology is a very demanding image processing application; current applications are achieving dynamic precision of one hundredth of a pixel or better. As such it requires an accurate image acquisition system, with minimal distortions. Distortions can be physical (e.g. pixel size / shape) or electronic (e.g. clock skew) in nature. They can also affect the image shape, or the gray level intensity of individual pixels, the former causing severe problems to pattern recognition and measurement algorithms, the latter having an adverse effect primarily on the measurement itself.
This paper considers the artifacts that are present in a particular analogue camera, with a discussion on how these artifacts translate into a reduction of overlay metrology performance, in particular their effect on precision and tool induced shift (TIS). The observed effects include, but are not limited to, banding and interlacing.
This camera is then compared to two digital cameras. The first of these operates at the same frame rate as the analogue camera, and is found to have fewer distortions than the analogue camera. The second camera operates with a frame rate twice that of the other two. It is observed that this camera does not exhibit the distortions of the analogue camera, but instead has some very specific problems, particularly with regards to noise.
The quantitative data on the effect on precision and TIS under a wide variety of conditions, is presented. These show that while it is possible to achieve metrology-capable images using an analogue camera, it is preferable to use a digital camera, both from the perspective of overall system performance, and overall system complexity.