Texas Instruments’ Digital Micro-mirror Device, is used in a wide variety of optical display applications ranging from fixed and portable projectors to high-definition television (HDTV) to digital cinema projection systems. A new DMD pixel architecture, called "FTP", was designed and qualified by Texas Instruments DLPTM<sup>TM</sup> Group in 2003 to meet increased performance objectives for brightness and contrast ratio. Coordination between design, test and fabrication groups was required to balance pixel performance requirements and manufacturing capability. "Corner Lot" designed experiments (DOE) were used to verify "fabrication space" available for the pixel design. The corner lot technique allows confirmation of manufacturability projections early in the design/qualification cycle. Through careful design and analysis of the corner-lot DOE, a balance of critical dimension (cd) "budgets" is possible so that specification and process control limits can be established that meet both customer and factory requirements. The application of corner-lot DOE is illustrated in a case history of the DMD "FTP" pixel. The process for balancing test parameter requirements with multiple critical dimension budgets is shown. MEMS/MOEMS device design and fabrication can use similar techniques to achieve agressive design-to-qualification goals.
Burn-in test has long been used in the semiconductor industry to screen out manufacturing defects. MEMS technologies, such as the DMD, can also use burn-in test to eliminate infant mortality failures. Burn-in test and test systems are among the most costly however, and it is always under review to shorten time or increase efficiency without reducing effectiveness. Detailed failure mode analysis from many thousands of device test logs resulted in the development of a novel application of an observed stress factor. Burn-in test time was reduced 55% on high volume DMD products with increased test efficiency and effectiveness.