The use of different illumination source shapes and multipatterning processes used to generate sub–40-nm images can create image placement errors level to level, resulting in significant intrafield overlay errors. These errors arise because of the impact of the different pupil shapes on lens aberrations resolving into image placement errors as well as because different tools will react differently to the same pupil shapes. We compare the impact of two extreme illumination sources on intrafield image placement and its effect on overall pattern overlay. We also discuss a method to empirically isolate and measure the amount of intrafield overlay distortion relative to a reference illumination source and then use the results to correct the resultant image placement errors.
The use of extreme freeform illumination conditions and multi patterning processes used to generate sub 40nm images can result in significant intra-field overlay errors. When levels with differing illumination conditions are aligned to each other, these intra-field distortions can result in overlay errors which are uncorrectable using normal linear feedback corrections. <p> </p>We use a double exposure method, previously described by Minghetti  et al. to isolate and measure intra-field overlay distortions caused by tool lens signatures and different illumination conditions. A full field test reticle is used to create a dual level expose pattern. The same pattern is exposed twice, but with two different illumination conditions. The first exposure is done with a standard reference illumination. The second exposure is the target illumination condition. The test reticle has overlay target pairs that are measurable when the 2nd exposure is offset in the Y direction by the designed amount. This allows for a high density, 13x13, intra-field overlay measurement to be collected and modeled to determine 2<sup>nd</sup> and 3<sup>rd</sup> order intra-field terms. Since the resulting illumination and scanner lens specific intra field corrections are independent of field size, the sub-recipes can be applied to any product exposure independent of field size, which use the same illumination conditions as the test exposures. When the method is applied to all exposure levels in a product build cycle, the overlay errors contributed by the reference illumination condition cancel out. The remaining errors are due exclusively to the impact of the illumination condition on that scanner lens. <p> </p>Actual results correlated well with the model with more than 80% of the predicted overlay improvement being achieved.
This paper describes the joint development and optimization of an advanced critical dimension (CD) control methodology at IBM’s 300 mm semiconductor facility. The work is initially based on 22 nm critical level gate CD control, but the methodology is designed to support both the lithography equipment (1.35 NA scanners) and processes for 22, 20, 18, and 14 nm node applications. Specifically, this paper describes the CD uniformity of processes with and without enhanced CD control applied. The control methodology is differentiated from prior approaches<sup>1</sup> by combining independent process tool compensations into an overall CD dose correction signature to be applied by the exposure tool. In addition, initial investigations of product specific focus characterization and correction are also described.
Requirements for ever tightening overlay control are driving improvements in tool set up and matching procedures, APC
processes, and wafer alignment techniques in an attempt to address both systematic and non systematic sources of
overlay error. Thermal processes used in semiconductor manufacturing have been shown to have drastic and
unpredictable impacts on lithography overlay control. Traditional linear alignment can accommodate symmetric and
linearly uniform wafer distortions even if these defects vary in magnitude wafer to wafer. However linear alignment
cannot accommodate asymmetric wafer distortions caused by variations in film stresses and rapid thermal processes.
Overlay improvement techniques such as Corrections per Exposure can be used to compensate for known systematic
errors. However, systematic corrections applied on a lot by lot basis cannot account for variations in wafer to wafer grid
distortions caused by semiconductor processing. With High Order Wafer Alignment, the sample size of wafer alignment
data is significantly increased and modeled to correct for process induced grid distortions. HOWA grid corrections are
calculated and applied for each wafer. Improved wafer to wafer overlay performance was demonstrated.
How HOWA corrections propagate level to level in a typical alignment tree as well as the interaction of mixing and
matching high order wafer alignment with traditional linear alignment used on less overlay critical levels. This
evaluation included the evaluating the impact of overlay offsets added by systematic tool matching corrections, product
specific corrections per exposure and 10 term APC process control.
This work describes the implementation and performance of AGILE focus corrections for advanced photo lithography in volume production as well as advanced development in IBM's 300mm facility. In particular, a logic hierarchy that manages the air gage sub-system corrections to optimize tool productivity while sampling with sufficient frequency to ensure focus accuracy for stable production processes is described. The information reviewed includes:
General AGILE implementation approaches; Sample focus correction contours for critical 45nm, 32nm, and 22nm applications; An outline of the IBM Advanced Process Control (APC) logic and system(s) that manage the focus correction sets; Long term, historical focus correction data for stable 45nm processes as well as development stage 32nm processes; Practical issues encountered and possible enhancements to the methodology.
More sophisticated corrections of overlay error are required because of the challenge caused by technology
scaling faster than fundamental tool improvements. Starting at the 45 nm node, the gap between the matchedmachine-
overlay error (MMO) and technology requirement has decreased to the point where additional
overlay correction methods are needed. This paper focuses on the steps we have taken to enable
GridMapper<sup>TM</sup>, which is offered by ASML, as a method to reduce overlay error.
The paper reviews the basic challenges of overlay error and previous standard correction practices. It then
describes implementation of GridMapper into IBM's 300 mm fabrication facility. This paper also describes
the challenges we faced and the improvements in overlay control observed with the use of this technique.
Specifically, this paper will illustrate several improvements:
1. Minimization of non-linear grid signature differences between tools
2. Optimization of overlay corrections across all fields
3. Decreased grid errors, even on levels not using GridMapper
4. Maintenance of the grid for the lifetime of a product
5. Effectiveness in manufacturing - cycle time, automated corrections for tool grid signature changes
and overlay performance similar to dedicated chuck performance
Focus and dose control of lithography tools for leading edge semiconductor manufacturing are critical to obtaining
acceptable process yields and device performance. The need for these controls is increasing due to the apparent limitation of optical water immersion lithography at NA values of approximately 1.35 and the need to use the same equipment for 45nm, 32nm, and 22nm node production. There is a rich history of lithographic controls using various techniques described in the literature. These techniques
include (but are not limited to) Phase Grating Focus Monitoring<sup>1</sup> (PGFM), optical CD control using optical overlay metrology equipment (OOCD)<sup>2,3</sup>, and in more recent years optical scatterometry<sup>4,5</sup>. Some of the techniques, even though they are technically sound, have not been practical to implement in volume manufacturing as controls for various reasons.
This work describes the implementation and performance of two of these techniques (optical scatterometry and OOCD)
in a volume 300mm production facility. Data to be reviewed include:
- General implementation approach.
- Scatterometry dose and focus stability data for 193nm immersion and 248nm dry lithography systems.
- Analysis of the stability of optical scatterometry dose and focus deconvolution coefficients over time for 193nm
immersion and 248nm dry systems.
- Comparison between scatterometry and OOCD techniques for focus monitoring of 248nm dry systems.
The presentation will also describe the practical issues with implementing these techniques as well as describe some possible extensions to enhance the current capabilities being described.
The process window for state of the art chip manufacturing continues to decrease, driven by higher NA exposure tools
and lower k1 values. The benefits of immersion lithography for Depth of Focus (DoF) are well known. Yet even with
this immersion boost, NA=1.35 tools can push DoF into sub-100nm territory. In addition, immersion processes are
subject to new sources of dose and focus variation. In order to realize the full potential of immersion lithography, it is
necessary to characterize, understand and attack all sources of process variation.
Previous work has established our dose/focus metrology capability<sup>1</sup>, in which we expose Process Monitor Grating
(PMG) targets with high sensitivity to focus, measure the PMGs using scatterometry, and use the Ausschnitt dose/focus
deconvolution approach to determine focus errors to within a few nm and dose errors to within 0.1%. In this paper, we
concentrate on applying this capability to the detailed measurements of immersion photoclusters utilizing ASML
exposure tools. Results will include:
• comparison of Twinscan 1700i and 1900i focus capability
• effectiveness of the Reticle Shape Correction (RSC) for non-flat reticles
• visualization of non-flat wafer chucks, tilted image planes, and other systematic focus error components
• tracking of tool trends over time, using automated monitor wafer flows
The highly systematic nature of the observed focus errors suggest potential for future improvements in focus capability.
Depth of Focus (DOF) and exposure latitude requirements have long been ambiguous. Techniques range from scaling
values from previous generations to summing individual components from the scanner. Even more ambiguous is what
critical dimension (CD) variation can be allowed to originate from dose and focus variation. In this paper we discuss a
comprehensive approach to measuring focus variation that a process must be capable of handling. We also describe a
detailed methodology to determine how much CD variation can come from dose and focus variation. This includes
examples of the statistics used to combine individual components of CD, dose and focus variation.
It is well known that the refractive optics used in today's exposure tools are highly chromatic, meaning that small wavelength shifts will cause large focus shifts. Even a line-narrowed excimer laser has a large enough range of wavelengths that we can no longer think of an infinitely thin image plane. The concept of "focus blur" can be generalized to encompass the effect of laser bandwidth chromatic aberrations, vertical stage vibrations, and stage tilts, which cause the focus to change during the scan. We introduce a new parameter called mean absolute defocus that can characterize the focus blur and is shown to correlate with the lithographic effects. Focus blur can be incorporated into simulation models, in a manner similar to the way that stage vibration is modeled. New simulation results illustrate the impact of focus blur on modern lithographic processes. Process stability and machine-to-machine matching issues are discussed.
It is well known that the refractive optics used in today's exposure tools are highly chromatic, meaning that small wavelength shifts will cause large focus shifts. Even a line-narrowed excimer laser has a large enough range of wavelengths that we can no longer think of an infinitely thin image plane. The concept of "focus blur" can be generalized to encompass the effect of laser bandwidth chromatic aberrations, vertical stage vibrations (MSDz) and stage tilts which cause focus to change during the scan. This paper will introduce a new parameter called Mean Absolute Defocus (MAD) that can characterize the focus blur, and will be shown to correlate with the lithographic effects. Focus blur can be incorporated into simulation models, in a manner similar to the way that stage vibration is modeled. New simulation results will illustrate the impact of focus blur on modern lithographic processes. Process stability and machine-to-machine matching issues will be discussed.
The shrink of semiconductor fabrication ground rule continues to follow Moore's law over the past years. However, at the 100 nm node, the fabrication cost starts to rise rapidly. This is mainly due tot he increase of complexity in the fabrication process, including the use of hard masks, planarization, resolution enhancement techniques, etc. Smaller device sizes require higher alignment tolerances. Also, higher degree of complexity makes alignment detection more difficult. For example, planarization techniques may destroy mark topography; hard masks may optically bury alignment marks, and more film layers makes the alignment signal more susceptible to process variations. Therefore in order to achieve reliable alignment, it is absolutely critical to develop an accurate and fast simulation software that can characterize alignment performance based on the film stack structure. In this paper, we will demonstrate that we have built an extremely fast alignment performance based on the film stack structure. In this paper, we will demonstrate that we have built an extremely fast alignment signal simulator for both direct imaging and diffractive detection system based on simple optical theory. We will demonstrate through examples using our advanced DRAM products that it is capable of accurately mapping the multi-dimensional parameter space spanned by various film thickness parameters within a short period of time, which allows both on-the-fly feedback in alignment performance and alignment optimization.
The impact of alignment mark structure, mark geometry, and stepper alignment optical system on mark signal contrast was investigated using computer simulation. Several sub-wavelength poly silicon recessed film stack alignment targets of advanced memory products were studied. Stimulated alignment mark signals for both dark-field and bright-field systems using the rigorous electromagnetic simulation program TEMPEST showed excellent agreement with experimental data. For a dark-field alignment system, the critical parameters affecting signal contrast were found to be mark size and mark recess depth below silicon surface. On the other hand, film stack thickness and mark recess depth below/above silicon surface are the important parameters for a bright-field alignment system. From observed simulation results optimal process parameters are determined. Based on the simulation results some signal enhancement techniques will be discussed.
A procedure is described for preparing relief alignment marks with precisely degraded quality that are then used to calibrate alignment performance. Alignment degrades with mark quality, eventually failing when the marks are no longer found. Using conventional processes it is difficult to accurately find this threshold and virtually impossible to experimentally establish the functional relationship between alignment mark quality and alignment precision. Marks that simulate a full range of process conditions, including planarization and granularity, are formed utilizing the continuous tone relief response of I-line photoresist to (lambda) equals 248 nm dose, thereby avoiding the complication of fabricating wafers through selective steps of the actual semiconductor manufacturing process. The usual box in box overlay measurement problem, caused by boxes formed by different processes, is avoided by printing high contrast overlay evaluation structures regardless of the alignment mark quality. Overlay is measured and plotted as a function of mark quality and the lithography engineer knows precisely the condition of the alignment system. For example; it is easily established by direct measurement the alignment system's ability to control magnification as the relief of the alignment marks change.
Deep-ultaviolet (DUV) step-and-scan projection systems have been increasing in semiconductor manufacturing importance in recent years. IBM and other semiconductor manufacturers have made substantial use of 0.50 numerical aperture (NA) step-and- scan systems for production resolutions down to approximately 250 nm resolution. This paper describes the initial system characterization and product performance of a next generation, 0.60 NA scanner system in early semiconductor production.
The MICRASCAN-II (MS-II) is a 0.50 NA DUV broadband illumination (245 nm to 252 nm) step-and-scan exposure system manufactured by Silicon Valley Group Lithography Systems, Inc. (SVGL) of Wilton, Connecticut. The system is designed to provide 350 nm resolution and 90 nm overlay in a semiconductor manufacturing environment. Overlay system improvements and performance testing have been made on pre-production and production versions of the MS-II. The MICRASCAN system has both a laser illuminated `through-the-lens' (TTL) and a broadband illuminated `off-axis alignment system' (OAAS). This paper summarizes the progression of system overlay improvements and the results of the tests conducted. Results from initial baseline tests pre and post system improvements on artifact wafers are presented. Product level data collected from marathon testing showing system performance on six individual product levels and areas for improvement are presented. Descriptions of an improved TTL alignment system and its attributes are provided. A description of a new and completely independent alignment system (OAAS) and its attributes are discussed.
The Micrascan II is a 0.50 NA DUV, broadband illumination (245 nm to 252 nm) step-and- scan exposure system manufactured by Silicon Valley Group Lithography Systems, Inc. (SVGL) of Wilton, Connecticut. The tool has been designed to provide 350 nm resolution and 90 nm overlay (mean + 3 sigma) in a semiconductor manufacturing environment. The system utilizes a reticle-limited field size of 22.0 X 32.5 mm. Lithographic and system performance testing of pre-production and production versions of the Micrascan II have been performed. Data from the source acceptance testing of the preproduction tool, as well as product level overlay results, are presented. The production tool acceptance test data are also presented along with results of the first SEMATECH marathon cluster test simulating a manufacturing environment. The production tool is integrated with an SVG 90 series track providing all pre-exposure and post-exposure wafer processing. All work reported has been accomplished using 200 mm wafer substrates.