Nowadays, thin-film transistors (TFTs) are being actively researched not only by the scientific community but also by the industry. They are the crucial elements for the driving currents in flexible displays, radio frequency identification tags and wearable electronic skins. In this study, we present a low-cost integration process of ZnO nanoparticle TFTs on flexible substrates with a maximum process temperature limited to 115 °C. As gate dielectric a high-k resin filled with TiO2 nanoparticle was used. This nanocomposite combines the mechanical flexibility of organic compounds with the high dielectric permittivity of inorganic materials. For the stabilization of the nanoparticulated ZnO film, a high humidity treatment was performed subsequent to an ultra-violet irradiation step in order to prevent the adsorption of oxygen molecules by the nanoparticles. The transistor integration process was performed on a freestanding polyethylene terephthalate (PET) substrate. This technique enables a more realistic scenario for a later large-scale production and avails adequate photolithographic resolution and accurate alignment between different mask levels. Additionally, in order to improve the electrical properties of the nanoparticulated semiconducting film, the nanoparticles were deposited using either spin-coating or spray-coating techniques; furthermore, different surface pretreatments were executed.
Key issues for flexible complementary electronics are low temperature processing, sufficient performance of the
integrated p- and n-type FET devices, and cheap semiconducting and dielectric materials. Organic semiconductors
commonly depict p-type behavior, whereas metal oxide semiconductors show n-type characteristics. This paper presents
a new approach for common integration of organic and ZnO transistors on transparent substrates for complementary
transistor electronics. The gate dielectric consists of a special high-k resin, the metallization utilizes Au and Al films. The
thermal budget for processing of the devices is limited to 120°C to enable foil substrates.
Thermoelectric generators (TEGs) can be used as robust and maintenance-free power supplies. The power
density of currently available TEGs is about 1 W/cm² and sufficient for many low power
sensor/microelectromechanical systems. By changing the sintering atmosphere and using a special set-up a
standard industry process used for insulating or metallic materials was transferred to thermoelectric FeSi2-,
Mg2Si- and SiGe-material. Thereby, separated compact- and sintering steps allows a mass producible process
in contrast to the almost exclusively used SPS- and FAST-processes. All three materials have been further
processed to functional TEG-modules by sawing, bonding and electrically contacting with TiSi2. Thereby, the
mechanical bond as well as the electrical contacts are thermally stable up to 800 °C. The general functionality
and the characteristics of the final TEG-modules were confirmed by analysis in a measurement setup that
simulates an application in a realistic environment.
High efficient dye sensitized solar cells typically apply expensive materials. To reduce the costs natural dyes, carbon
nanotubes and an additional contact layer were introduced. UV-irradiation substitutes typical sintering processes for the
TiO2 nanoparticle film. Replacing the ITO coated glass electrodes by a metal grid structure reduces the integration costs
further more. Best results were achieved using a grid structure with openings in the dimension of the diffusion length of
the charge carriers.
Potentiometry with a Kelvin probe atomic force microscope is used to investigate the contact resistances of pentacene OFETs, so that the injection of the charges at the source contact and their extraction at the drain contact can be distinguished from the influence of trap
states on the charge transport through the accumulation channel. The
samples consist of Au bottom contacts on a SiO2 gate dielectric with a channel length of L=10- 15 μm and a channel
width of W=100 μm. The gate oxide is first treated by an
oxygen plasma before depositing about 30 nm of pentacene under high
vacuum conditions. The output characteristics are measured as a
function of temperature in an evacuated cryostat, revealing
temperature-activated hole transport. The potentiometry measurements
are performed ex situ under atmospheric conditions after storing
the samples in air for several weeks. At room temperature, the
pentacene OFETs are dominated by the resistance at the injection
contact, so that the mobility in the channel region as deduced from
potentiometry is about one order of magnitude higher than the value
obtained from the output characteristics. The measurements are
interpreted with microscopic model calculations for the
Organic thin film transistors on silicon substrate are fabricated by standard lithography techniques to get transistors with micrometer scale gate length. The semiconducting layer consists of the evaporated organic molecule Pentacene. Transistor parameters taken from transistors with channel lengths of 10 μm - 1 μm confirm the validity of the models for silicon MOS transistors. For further reduction in channel length the imprint technique is proposed to integrate sub micron distances between the drain and source metallization of the transistor.
The fabrication of piezo-resistive pressure sensors for high temperature applications by the selective removal of CVD-diamond is limited due to the jutting physical properties of this material, which result in insufficient etching rates. A novel technique with distinctly increased etching rates due to a modified sample arrangement inside of a commercially available reactive ion etching (RIE) reactor overcomes this limitation by a restricted plasma volume. Rates up to 334 nm/min imply an increase of more than one order of magnitude in comparison with additional measurements utilizing a standard etching technique. Furthermore, the electrical response of a fabricated sensor on pressure is demonstrated.