This paper investigates the potential of ISESOV architecture for low-voltage digital applications. A circuit analysis is
performed for ISESOV MOSFET in terms of voltage transfer curve (VTC), supply current and noise margin and
switching speed. These results are also compared with the ISE, SOV and bulk MOSFET architectures. Further
improvement in the characteristic of inverter in terms of VTC and noise margin is observed by incorporating the gate
stack architecture. The impact of Dual Material Gate architecture on the inverter performance has been also studied
through exhaustive device simulations and it can be concluded that. ISESOV is a promising candidate for future digital
applications as compared to ISE, SOV and bulk because it combines the advantages of both ISE and SOV architectures.