We present two lines of ASICs dedicated to the control and readout of CCD sensors. The CABAC (Clocks And Biases ASIC for CCDs) provides all required bias voltages and clocks. The ASPIC (Analog Signal Processing Integrated Circuit) processes 8 CCD output channels: amplification, Correlated Double Sampling, conversion to differential signal. Both chips are highly configurable in order to fulfill a wide range of astronomical CCD readout needs, from fast readout of wide-field imaging arrays to slower speeds and higher gains for spectroscopy. Their sizes and temperature ranges allow to integrate them in-cryostat, close to the sensors, and they offer diagnostic capabilities to assist the integration. In addition to extensive stand-alone tests, these chips are integrated in the LSST REB (Raft Electronics Board), and have been tested driving the E2V prototype CCD for the LSST focal plane.
The science focal plane of the Large Synoptic Survey Telescope is made up of 21 modules designated "raft towers".
Each raft tower module (RTM) is an autonomous, fully-testable and serviceable 144 Mpixel imager consisting of nine
highly-segmented CCDs with complete readout electronics chain. To minimize noise and obscuration the RTM is
housed in a compact enclosure fully contained within the camera cryostat. The RTM is required to meet strict
performance goals for image plane flatness, readout speed, noise, and power dissipation. Key components include the
4K × 4K fully-depleted CCDs with 16 outputs each, ceramic CCD support structure, and ASIC electronics for video
processing and clock/bias generation. In addition to CCD signal handling, the RTM electronics also includes monitoring
for temperature, voltage, and current, makeup heater control, ASIC configuration and readback, powerdown modes, and
specialized diagnostic outputs. Digitized data are transmitted out of the camera cryostat over a single 3Gb/s serial link.