This paper focuses on the metrology needs and challenges of through-silicon via (TSV) fabrication, consisting of TSV etch, liner, barrier, and seed (L/B/S) depositions, copper plating, and copper chemical mechanical planarization. These TSVs, with typical dimensions within a factor of two or so of ≈5 μm ×50 μm (diameter×depth ), present an innovative set of metrology challenges because of the high aspect ratio and large feature sizes. The metallization deposition process includes thin layers of L/B/S metal; metrology for these layers determines whether there is complete coverage of the sidewalls. Metrology for the fill step includes verifying that the TSVs are deposited without voids and that the extent of stress on the surrounding silicon does not exceed acceptable limits.
The three-dimensional (3-D) integrated circuit relies on the stacking of multiple two-dimensional integrated circuits into a single device using through silicon vias (TSVs) as the vertical interconnect. There are a number of factors driving 3-D integration, including reduced power consumption, resistance–capacitance delay, form factor, as well as increased bandwidth. One of the critical process steps in all 3-D processes is stacking, which may take the form of wafer-to-wafer, chip-to-wafer, or chip-to-chip bonding. This bonding may be temporary, such as can be used for attaching a device wafer to a handle wafer for thinning, or permanent, incorporating direct metal bonds or solder bumps to carry signals between the wafers and oxide bonds or underfill in the regions without conductors. In each of these processes, it is critical that the bonding is executed in such a way to prevent the occurrence of voids between the layers. This article describes the capabilities of infrared (IR) microscopy to detect micrometer size voids that can form in optically transparent blanket media such as oxide-to-oxide permanent bonding, benzocyclobuten permanent bonding, or temporary adhesive bonding laminate interfaces. The infrared microscope is described, and the measurement results from a bonded void wafer set are included. The wafers used to demonstrate the tool’s capabilities include programmed voids with various sizes, densities, and depths. The results obtained from the IR microscopy measurements give an overview of the technique’s capability to detect and measure voids as well as some of its limitations.
This paper reports on an investigation to determine whether through-focus scanning optical microscopy (TSOM) is applicable to micrometer-scale through-silicon via (TSV) reveal metrology. TSOM has shown promise as an alternative inspection and dimensional metrology technique for FinFETs and defects. In this paper TSOM measurements were simulated using 546 nm light and applied to copper TSV reveal pillars with height in the 3 μm to 5 μm range and diameter of 5 μm. Simulation results, combined with white light interferometric profilometry, are used in an attempt to correlate TSOM image features to variations in TSV height, diameter, and sidewall angle (SWA). Simulations illustrate the sensitivity of Differential TSOM Images (DTI’s) using the metric of Optical Intensity Range (OIR), for 5 μm diameter and 5 μm height TSV Cu reveal structures, for variation of SWA (Δ = 2°, OIR = 2.35), height (Δ = 20 nm, OIR = 0.28), and diameter (Δ = 40 nm, OIR = 0.57), compared to an OIR noise floor of 0.01. In addition, white light interferometric profilometry reference data is obtained on multiple TSV reveal structures in adjacent die, and averages calculated for each die’s SWA, height, and diameter. TSOM images are obtained on individual TSV’s within each set, with DTI’s obtained by comparing TSV’s from adjacent die. The TSOM DTI’s are compared to average profilometry data from identical die to determine whether there are correlations between DTI and profilometry data. However, with several significant TSV reveal features not accounted for in the simulation model, it is difficult to draw conclusions comparing profilometry measurements to TSOM DTI’s when such features generate strong optical interactions. Thus, even for similar DTI images there are no discernible correlations to SWA, diameter, or height evident in the profilometry data. The use of a more controlled set of test structures may be advantageous in correlating TSOM to optical images.
This paper will examine the future for critical dimension (CD) metrology. First, we will present the extensive list of applications for which CD metrology solutions are needed, showing commonalities and differences among the various applications. We will then report on the expected technical limits of the metrology solutions currently being investigated by SEMATECH and others in the industry to address the metrology challenges of future nodes, including conventional CD scanning electron microscopy (CD-SEM) and optical critical dimension (OCD) metrology and new potential solutions such as He-ion microscopy (HeIM, sometimes elsewhere referred to as HIM), CD atomic force microscopy (CD-AFM), CD small-angle x-ray scattering (CD-SAXS), high-voltage scanning electron microscopy (HV-SEM), and other types. A technical gap analysis matrix will then be demonstrated, showing the current state of understanding of the future of the CD metrology space.
Through-focus scanning optical microscopy (TSOM) is a novel method [1-8] that allows conventional optical
microscopes to collect dimensional information down to the nanometer level by combining 2D optical images captured
at several through-focus positions, transforming conventional optical microscopes into truly 3D metrology tools for
nanoscale to microscale dimensional analysis with nanometer scale sensitivity. Although not a resolution enhancement
method, it has been shown to provide lateral and vertical measurement sensitivity of less than a nanometer ,
comparable to the dimensional measurement sensitivity of other critical dimension (CD) metrology tools. The technique
is capable of measuring features far beyond the theoretical resolution limits of optical microscopy, because it can capture
much richer data at many z-heights (i.e., through focus). Additionally, TSOM appears to decouple the measurement of
profile dimensional changes at the nanoscale, such as small perturbations in sidewall angle and height, with little or no
ambiguity, and may be able to analyze target dimensions ranging from as small as 10 nm up to many microns with
similar nanometer-scale sensitivity. Furthermore, previous simulation and experimental work has shown this method to
be applicable to a variety of target materials and structures, such as nanoparticles, semiconductor memory features, and
buried structures under transparent films. Additionally, this relatively simple technique is inexpensive and has high
throughput, making it attractive for a variety of semiconductor metrology applications, such as CD, photomask, overlay,
and defect metrologies .
In-line defect metrology is continuously challenged by the aggressive pace of device scaling. It is expected that the
conventional brightfield techniques currently used in semiconductor manufacturing will not be able to meet defect
inspection requirements near the 11 nm node. Electron beam-based inspection is able to meet resolution limits well
below the 11 nm node, but operates at a significantly lower throughput. It has therefore become necessary to explore
alternative approaches that have the potential to meet both resolution and throughput requirements.
This work will present TSOM results of simulations and supporting experiments to demonstrate the metrology
application of TSOM to features at the ITRS 22 nm node , including measurement of linewidths down to 10 nm,
showing the ability to measure changes in line height, sidewall angle, and pitch variations. By extension, these results
will show the feasibility of applying TSOM to important contemporary metrology problems in measuring doublepatterned
features and FinFETs. Additionally, we will theoretically explore the use of TSOM to inspect defects on gatelevel
arrays with different CDs down to 15 nm. This theoretical work consisted of modeling the optical response of
cross-sectional perturbations and several patterned defect types and sizes using illumination wavelengths ranging from
visible to deep ultraviolet (DUV) under different illumination polarizations. The results indicate that TSOM may be able
to detect small CD and profile changes in fins of FinFET structures as well as defects that currently challenge
conventional brightfield optical methods. The simulation results also indicate an added advantage of the TSOM method
to differentiate certain types of defects and their orientations by exhibiting different optical intensity patterns. These
results will provide insight into the feasibility of TSOM for CD and yield enhancement metrology.
Moore's Law continues to drive improvements to lithographic resolution to increase integrated circuit transistor density,
improve performance, and reduce cost. For the 22 nm node and beyond, extreme ultraviolet lithography (EUVL) is a
promising technology with λ=13.5 nm, a larger k<sub>1</sub> value and lower cost of ownership than other available technologies.
For small feature sizes, process control will be increasingly challenging, as small features will create measurement
uncertainties, yet with tighter specifications. Optical scatterometry is a primary candidate metrology for EUV
lithography process control. Using simulation and experimental data, this work will explore scatterometry's application
to a typical lithography process being used for EUV development, which should be representative of lithography
processes that will be utilized for EUV High Volume manufacturing (HVM). EUV lithography will be performed using
much thinner photoresist thicknesses than were used at the 248nm or 193nm lithography generations, and will probably
include underlayers for adhesion improvement; these new processes conditions were investigated in this metrological
This paper presents an evaluation of e-beam assisted deposition and welding of conductive
carbon nanotube (c-CNT) tips for electrical scanning probe microscope measurements.
Variations in CNT tip conductivity and contact resistance during fabrication were determined as
a function of tip geometry using tunneling AFM (TUNA). Conductive CNT tips were used to
measure 2D dopant concentration as a function of annealing conditions in BF<sub>2</sub>-implanted
Photo-reflectance (PR) provides an optical means for rapid and precise measurement of near-surface
electric fields in semiconductor materials. This paper details the use of photo-reflectance to
characterize dopant activation in ultra-shallow junction (USJ) structures formed using millisecond
anneal processes. USJ structures were formed in silicon using 500eV boron implantation with a dose of
10<sup>15</sup>/cm<sup>2</sup>, followed by flash anneals at 1250-1350°C. Reference metrology was performed using
secondary ion mass spectroscopy (SIMS) and various sheet resistance (R<sub>s</sub>) methods. Methods to
calibrate photo-reflectance signals to active carrier concentration in USJ structures, including halo-doped
samples, are described. Photo-reflectance is shown to be highly sensitive to active dopant
concentration in USJ structures formed by millisecond annealing. Additionally, PR provides fast "on-product"
Strained silicon is applied to the transistor channel of leading-edge CMOS devices, significantly increasing carrier
mobility and requiring measurement techniques to characterize strain. In the investigation reported here, we apply
Raman spectroscopy using excitation by both visible and UV light in conjunction with finite-element analysis to analyze
the strain distribution adjacent to embedded silicon-germanium (SiGe) line structures in silicon wafers. In agreement
with the modeling results, a strong strain depth gradient is obtained for the silicon lines, whereas the strain within the
SiGe regions depends weakly on the depth. We show further how the stress tensor and its distribution in both SiGe and
Si regions is modified when changing the geometry of the line structures. For the strained Si line region, a sensitive
dependence of the stress state on the geometry is obtained.
Proc. SPIE. 6518, Metrology, Inspection, and Process Control for Microlithography XXI
KEYWORDS: Metrology, Etching, Copper, Atomic force microscopy, Scanning electron microscopy, Transmission electron microscopy, 3D metrology, Process control, Critical dimension metrology, Semiconducting wafers
Accurate, precise, and rapid three-dimensional (3D) characterization of patterning processes in integrated
circuit development and manufacturing is critical for successful volume production. As process tolerances and circuit
geometries shrink with each technology node, the precision, accuracy, and capability requirements for dimension and
profile metrology intensify. The present work adopts the scanning probe based technology, 3D atomic force
microscopy (AFM), to address current and next-generation critical dimension (CD) metrology needs for device features
at a variety of process steps. Fast, direct, and non-destructive 3D profile characterization of patterning processes is a
primary benefit of CD AFM metrology. The CD AFM utilizes a deep trench (DT) mode for narrow and deep trenches,
and a CD mode for linewidth and sidewall profiling. The 3D capability enables one tool for many applications where
conventional scanning electron microscopy (SEM), scatterometry, and stylus profiler tools fall short: Gate etch/resist
linewidth and sidewall cross-section profile, etch depth for high aspect ratio via, STI etch depth, 3D analysis for
MUGFET multi-gate devices, pitch/CD/sidewall angle (SWA) verification for scatterometry targets, and post-CMP
active recess. The AFM is an efficient tool for inline monitoring, rapid process improvement/development, and is a
complementary addition to the dimension metrology family.