Despite the large difficulties involved in extending 193i multiple patterning and the slow ramp of EUV lithography to full manufacturing readiness, the pace of development for new technology node variations has been accelerating. Multiple new variations of new and existing technology nodes have been introduced for a range of device applications; each variation with at least a few new process integration methods, layout constructs and/or design rules. This had led to a strong increase in the demand for predictive technology tools which can be used to quickly guide important patterning and design co-optimization decisions. <p> </p>In this paper, we introduce a novel hybrid predictive patterning method combining two patterning technologies which have each individually been widely used for process tuning, mask correction and process-design cooptimization. These technologies are rigorous lithography simulation and inverse lithography technology (ILT). Rigorous lithography simulation has been extensively used for process development/tuning, lithography tool user setup, photoresist hot-spot detection, photoresist-etch interaction analysis, lithography-TCAD interactions/sensitivities, source optimization and basic lithography design rule exploration. ILT has been extensively used in a range of lithographic areas including logic hot-spot fixing, memory layout correction, dense memory cell optimization, assist feature (AF) optimization, source optimization, complex patterning design rules and design-technology co-optimization (DTCO). The combined optimization capability of these two technologies will therefore have a wide range of useful applications. We investigate the benefits of the new functionality for a few of these advanced applications including correction for photoresist top loss and resist scumming hotspots.
The screen size growth of mobile displays is accompanied with the drastically increased resolution. A display should
have high pixel resolution to meet demanding readability and legibility expectations. The manufacturing process should
be advanced to meet final device requirements. One of the important process steps is the post-development hardbake,
where resist reflow is used to tune the final profile which influences subsequent process steps. Moreover, 3D resist
profiles become one of critical design factors for mechanical and optical properties of display pixels. The resist reflow is
the main time- and temperature-dependent effect of post-development bake process step. Since the resist is in transitional
state (crystalline glassy/amorphous rubbery/viscous melt) the resist profile dynamics are very complex and predictive
modeling is necessary. The model presented in this paper is based on a lattice-Boltzmann method, where the resist is
considered as multicomponent (polymer-solvent) and multiphase (solid-liquid-vapor) mixture. Simulated resist profile
dynamics with time are analyzed in dependency of material parameters (solvent diffusivity and evaporation rate, polymer
solid fraction and adhesion with substrate). Temperature-dependent parameter descriptions are used for model
calibration. Validation against experimental data shows good model consistency and predictability, demonstrating the
benefit of simulation in process development and optimization.
DRAM chip space is mainly determined by the size of the memory cell array patterns which consist of periodic
memory cell features. Resolution Enhancement Techniques are used to optimize the periodic pattern process
performance. This is often realized with aggressively coherent illumination sources supporting the periodic pattern
pitch only and making an array edge correction very difficult. The edge can be the most critical pattern since it
forms the transition from periodic patterns to non periodic periphery, so it combines the most critical pitch and
highest susceptibility to defocus. Non functional dummy structures are very effective to support the outermost
edge but are very expensive, so their reduction or avoidance directly increases chip space efficiency.
This paper focuses on how to optimize the DRAM array edge automatically in contrast to manual optimization
approaches that were used effectively but at high cost. We will show how to squeeze out the masks degrees of
freedom to stay within tight pattern tolerances. In that way we minimize process variations and the need of
costly non-functional dummy structures. To obtain the best possible results the optimization has to account for
complex boundary conditions: correct resist effect prediction, mask manufacturability constraints, low dose, low
MEEF, conservation of symmetries and SRAF printing, simultaneous optimization of main features and SRAFs.
By incorporating these complex boundary conditions during optimization we aim to provide first time right
layouts without the need for any post processing.
Lithographic process development at small k1 factors requires source-mask optimization (SMO) for obtaining
sufficient process stability. Two prerequisites must be fulfilled to directly employ the SMO solutions for the
optimized source and mask layouts: i) the simulation model underlying SMO should accurately predict the
printing on wafer, and ii) the mask patterns must be manufacturable. With regard to i), SMO including a
properly calibrated physical resist model is assumed to be more predictive across variable source and mask
shapes than SMO with a computationally fast but simplifying photoresist treatment. By coupling SMO and
rigorous lithography simulations, we effectively incorporate physical resist modelling into SMO. Additionally,
concerning ii), we tackle the manufacturability task by incorporating mask rule constraints already during SMO.
Optimizing the mask's degrees of freedom in a mask-rule constrained space, we avoid any post-processing of
the optimized mask clips and any corresponding degradation of the result quality. The concept of constrained
optimization is also extended to placing and optimizing assist features during SMO. We employ virtual assist
feature seeds that can only form real assists if mask rules are met. In that way assist features are simultaneously
co-optimized together with the main features and the source.We discuss our approach at 2 examples, a line/space
array edge and a SRAM cell, and point to reference1 for a rigorous cell optimization for DRAM.
We analyzed the lithographic performance of a double patterning technology (DPT) with resist freeze
(LFLE) process for printing dense contact holes (CH). For the first time, we quantified the contribution
of the substrate - frozen resist and topography effects. The impact on image contrast, and NILS was
In comparing to the case of a uniform L/S, the image through-pitch performance is degraded in LFLE
CH. This is resulted from diffraction by the underlying topography and materials. The process steps
(between first-and-second Litho) cause additional challenges in the fabrication of CHs using DPT.
Current inspection of the process effects only observes the reflected signal for position alignment. We
have introduced simulations of a phase change in polarized signal (ellipsometry) after first and second
lithography steps for suggesting a new methodology for detection and validation of topography changes
in DPT flow. In DPT the first Litho result is fabricated in substrate, so the analysis of ellipsometry signal
can be applied to sensitively detect correlations between two steps.
The spectroscopic ellipsometry simulation results were shown; α and β parameters demonstrate the
sensitivity w.r.t. substrate topography, by changing the incident optical direction from x-z to y-z plane.
This represents the correlation between parameters observed by respective Litho steps of perpendicular
Furthermore, ellipsometry signal was used to optimize the "frozen" resist n and k values w.r.t aerial
image performance, which can be fed back to DPT design.
Concluding, the information obtained by ellipsometry is useful to characterize substrate topography in
Among available lithography resolution enhancement techniques the Selective Inverse Lithography (SILT) approach
recently introduced by authors  has been shown to provide the largest process window on lower-NA exposure tools
for 65nm contact layer patterning. In present paper we attempt to harness the benefits of source mask optimization
(SMO) approach as part of our hybrid RET. The application of source mask optimization techniques further extends the
life-span of lower-NA 193nm exposure-tools in high volume manufacturing. By including SMO step in OPC flow, we
show that model-based SRAF solution can be improved to approach SILT process variation (PV) band performance.
Additionally to OPC, the complexity of embedded flash designs requires a high degree of exposure tool matching and a
lithography process optimized for topographically different logic and flash areas. We present a method how SMO can be
applied to scanner matching and topography-related optimization.
A new method for simultaneous Source-Mask Optimization (SMO) is presented. In order to produce optimum
imaging fidelity with respect to exposure lattitude, depth of focus (DoF) and mask error enhancement factor
(MEEF) the presented method aims to leverage both, the available degrees of freedom of a pixelated source
and those available for the mask layout. The approach described in this paper is designed as to work with
dissected mask polygons. The dissection of the mask patterns is to be performed in advance (before SMO) with
the Synopsys Proteus OPC engine, providing the available degrees of freedom for mask pattern optimization.
This is similar to mask optimization done for optical proximity correction (OPC). Additionally, however, the
illumination source will be simultaneously optimized. The SMO approach borrows many of the performance
enhancement methods of OPC software for mask correction, but is especially designed as to simultaneously
optimize a pixelated source shape as nowadays available in production environments. Designed as a numerical
optimization approach the method is able to assess in acceptable times several hundreds of thousands source-mask
combinations for small, critical layout snippets. This allows a global optimization scheme to be applied to the
SMO problem which is expected to better explore the optimization space and thus to yield an improved solution
quality compared to local optimizations methods. The method is applied to an example system for investigating
the impact of source constraints on the SMO results. Also, it is investigated how well possibly conflicting goals
of low MEEF and large DoF can be balanced.
Ongoing technology node shrinkage requires the lithographic k1 factor to be pushed closer to its theoretical limit. The
application of customized illumination with multi-pole or pixelated sources has become necessary for improving the
process window. For standardized exploitation of this technique it is crucial that the optimum source shape and the
corresponding intensity distributions can be found in a robust and automated way. In this paper we present a pixelated
source optimization procedure and its results. A number of application cases are considered with the following
optimization goals: i) enhancement of the depth of focus, ii) improvement of through-pitch behavior, and iii) error
sensitivity reduction. The optimization procedure is performed with fixed mask patterns, but at multiple locations. To
reduce optical proximity errors, mask biasing is introduced. The optimization results are obtained for the pixelated
source shapes, analyzed and compared with the corresponding results for multi-pole shaped sources. Starting with the
45 nm node mask topography effects as well as light polarization conditions have significant impact on imaging
performance. Therefore including these effects into the optimization procedure has become necessary for advanced
process nodes. To investigate these effects, the advanced topographical mask illumination concept (AToMIC) for
rigorous and fast electromagnetic field simulation under partially coherent illumination is applied. We demonstrate the
impact of mask topography effects on the results of the source optimization procedure by comparison to corresponding
Kirchhoff simulations. The effects of polarized illumination sources are taken into account.
In extreme ultraviolet lithography (EUVL) a reflective mask is illuminated obliquely and the illumination is partially coherent. Due to the small NA (0.25) and sigma (0.5) the incident angles do not vary too much throughout the source distribution, but, unlike in the optical case, the topography is rather pronounced. Moreover the multilayer reflectivity varies significantly even for small variations of the incident angle. So as a result the object spectrum will not only be shifted as a function of the source point, but amplitudes and phases will also vary significantly. On the way to more advanced technology nodes, NA needs to increase up to 0.5, and effects induced by partially coherent illumination could be critical and must be appropriately modeled and investigated. In this paper the impact of the real source distribution on EUVL imaging is investigated. For this a rigorous electro-magnetic field solver is used to predict the subtle effects associated with the three-dimensional topography of the mask absorbers. We introduce the advanced topographical mask illumination concept for rigorous and fast simulation of EUVL mask under partially coherent illumination. Rigorous simulations are performed for line and spaces with an outlook to future technology nodes.
Starting with the 45nm node, the minimum feature size on the mask has reached sub-wavelength dimension. In this
regime the electromagnetic field induced in the mask is significantly impacted by the mask topography. These so called
mask topography effects play an important role in the image formation process and need to be compensated for in the
optical proximity correction (OPC) model. Looking ahead to the 32nm process node, mask topography effects will
become even more pronounced. So, including these effects into the OPC model has become a must for advanced process
nodes. Modern OPC engines start to apply electromagnetic field (EMF) compensation techniques to take these effects
into account. Of course, due to the severe run time constrains for OPC models most EMF aware OPC models need to
rely on approximate methods. A reliable OPC verification process needs to include a fully rigorous treatment of the mask
topography effects with taking into account oblique light incidence and polarization of light. In this paper we investigate
the impact of rigorous mask topography simulation on the reliability of OPC verification and determine the influence of
EMF aware OPC models on OPC quality. We use lithography simulations on OPCed layout cells where we apply a fully
rigorous parallelized EMF solver to the mask model. Two different OPC models are used in this study; one based on the
conventional approach and another one using EMF compensation techniques. The results of the rigorous lithography
simulations are used to verify both OPC models. The impact of the EMF simulation on OPC verification quality is
illustrated by direct comparison with the corresponding Kirchhoff simulations for both OPC models.
Commonly the creation of data structure in optical system design software with sequential ray tracing are realized on the basis of ordinary arrays. Homogenous data structures have restrictions, main of which is a problem of enhancement. Often new optical surfaces, elements and media cannot be embedded into old data structures. In this paper a new object-oriented model of an arbitrary optical system is presented. This model utilizes a new data structure based on graphs and LDS (linked data structures). The inheritance and polymorphism make the data structure adaptable and extendible. Also this approach offers modeling multi-configuration and zoom optical system by a native way.
The computer model for partial coherent image based on vector theory of diffraction is presented. In this model the complex amplitude of light field is represented as superposition of basic vector plane waves. The optical system is considered as the amplitude-phase filter of a plane waves spectrum. The partial coherent illumination is described with the well-known approach--the source integration method. The presented model allows to carry out simulation of partial coherent image of amplitude-phase object with taking into account aberration and polarization effects in high NA optical systems.
The application of optical superresolution technique to measuring small particles, said to be secondary light sources with various scales of sizes - from micrometers to nanometers, is discussed. The concept of a separate nanosized object and theoretical approach to recognition of its size through the mathematical continuation of the visible angular spectrum of vector plane waves suggested.
Proc. SPIE. 3467, Far- and Near-Field Optics: Physics and Information Processing
KEYWORDS: Visible radiation, Light sources, Super resolution, Polarization, Spatial frequencies, Fourier transforms, Near field scanning optical microscopy, Near field, Light wave propagation, Near field optics
A new approach to the investigation of probes for scanning near-field optical microscopes and recognition of parameters of arbitrary secondary light sources in nanometric scale is suggested. A new numerical technique of analytical continuation of the Fourier spectrum with the object restoration procedure based on Zernike polynomials iterative extrapolation is presented.
Computer controlled process of microlens manufacturing and testing is described. Lens figuring is made by high energy CO<SUB>2</SUB> laser beam scanning over surface. Testing procedure is realized in the same installation without removal of manufactured lens. Test uses low energy He-Ne laser beam scanning over entrance pupil of lens using the same scanning system as during manufacturing procedure. Testing method is based on principles of Hartmann test but do not use any diaphragm. The least squares method is used to determine coefficients of Zernike polynomial expansion, describing testing lens surface figuring errors.