Self-Aligned Double Patterning (SADP) is widely applied in advanced sub-4X patterning technology, especially for the 1D resolution shrinkage of memory technology. As the application of SADP makes lithography minimum pitch down to half of design pitch with the remaining spacer aside core, its alignment mark and overlay (OVL) mark have to be well-segmented to ensure enough mark contrast. In this paper, we designed two types of image-based overlay (IBO) bar in bar (BIB) OVL target: bar-segmentation and background–segmentation with different duty ratio. Based on these two designed types of marks, we focus on the OVL of 2nd photo layer to 1st SADP layer with the core removed (which means spacer grating structure remained). We studied the effect of the overlay target segmentation on the precision and robustness of wafer-level overlay performance. Different lithography processes were also studied, including single layer lithography and tri-layer lithography with planarized spacer grating structures. We found there are strong correlations between overlay measurement accuracy and background segmentation rules. The results of our study will be presented and discussed in this paper.
In this paper, we present a study on the overlay (OVL) shift issue in contact (CT) layer aligned to poly-silicon (short as poly) layer (prior layer) in an advanced technology node [1, 2]. We have showed the wafer level OVL AEI-ADI shift (AEI: After Etch Inspection; ADI: After Developing Inspection; AEI-ADI: AEI minus ADI). Within the shot level map, there exists a center-edge difference. The OVL focus subtraction map can well match the OVL AEI-ADI shift map. Investigation into this interesting correlation finally leads to the conclusion of PR tilt. The film stress of the thick hard mask is responsible for the PR tilt. The method of OVL focus subtraction can therefore be a powerful and convenient tool to represent the OVL mark profile. It is also important to take into account the film deposition when investigating OVL AEI-ADI shift.
As integrated circuit (IC) industry steps into immersion lithography’s era, defectivity in photolithography becomes more
complex which requires more efforts in the analysis and solution finding when compared to traditional dry lithographic
process. In this paper, we focus on one type of immersion defect from memory or flash memory devices with typical
mask layouts. Since the use of self-aligned double patterning (SADP) or other double patterning techniques, the original
single pattern layer has to be split into 2 mask layers: logic area vs cell area. One characteristic of such split process is
that the total mask transmission rate (TR) is above 70%, with extended open area and a pattern area with a transmission
rate close to 50%. This indicates that it may have special defect mechanism and type compared to logic devices. We have
found one type of residue defect with center ring-like map. We have studied this defect with different development
recipes and analyzed their underlying mechanisms. We have also studied the effect of different immersion photoresists
including types with top-coating and without top-coating, as well as the effect of bottom anti-reflection coating (BARC)
substrate (organic-BARC/Si-BARC). The results of our study will be presented and discussed.
Proc. SPIE. 9424, Metrology, Inspection, and Process Control for Microlithography XXIX
KEYWORDS: Semiconductors, Electron beams, Metals, Inspection, Electron microscopes, Control systems, Scanning electron microscopy, Process control, Optical proximity correction, Critical dimension metrology
As the technology node of semiconductor industry is being driven into
more advanced 28 nm and beyond, the critical dimension (CD) error
budget at after-development inspection (ADI) stage and its control are
more and more important and difficult (1-4). 1 nm or even 0.5 nm CD
difference is critical for process control. 0.5~1 nm drift of poly linewidth
will result in a detectable off-target drift of device performance. The
0.5~1 nm CD drift of hole or metal linewidth on the backend interconnecting
layers can potentially contribute to the bridging of metal
patterns to vias, and thereby impact yield. In this paper, we studied one
function in the scanning electron microscope (SEM) measurement, i.e.
the adjustment of brightness and contrast (ABC). We revealed how the
step of addressing focus and even the choice of addressing pattern may
bring in a systematic error into the CD measurement. This provides a
unique insight in the CD measurement and the measurement consistency
of through-pitch (TP) patterns and functional patterns.