This paper addresses the optimization of power at the circuit level in the main blocks of CMOS APS image sensors. A pixel bias current of zero during the readout period is shown to reduce the static power and enhance the settling time of the pixel. A balanced operational transconductance amplifier (OTA) has been demonstrated to be a better candidate as an amplifier when employed in a correlated double sampling (CDS) circuit or as a comparator in an analog-to-digital (A/D) converter, as compared to a Miller two-stage amplifier. Using common-mode feedback (CMFB) in an OTA can further reduce the quiescent power of the amplifier. The low power capability of a CMFB OTA is discussed in this paper by performing a comparison with a conventional OTA using a 0.18 μm technology.
Damage in CMOS image sensors caused by heavy ions with moderate energy (~10MeV) are discussed through the effects on transistors and photodiodes. SRIM (stopping and range of ions in matter) simulation results of heavy ion radiation damage to CMOS image sensors implemented with standard 0.35μm and 0.18μm technologies are presented. Total ionizing dose, displacement damage and single event damage are described in the context of the simulation. It is shown that heavy ions with an energy in the order of 10 MeV cause significant total ionizing dose and displacement damage around the active region in 0.35μm technology, but reduced effects in 0.18μm technology. The peak of displacement damage moves into the substrate with increasing ion energy. The effect of layer structure in the 0.18 and 0.35 micron technologies on heavy ion damage is also described.