About 13-Terabyte data for Massive e-beam direct-write lithography (MEBDW) system, a potential solution for highvolume
manufacturing (HVM) of 10-nm and beyond technology nodes in a 26 mm x 33 mm field of layout, is required.
Therefore cost reduction on data storage and transmission through development of high compression rate of lossless data
and high throughput real time decompression algorithms is necessary.
In this paper, an instruction-based hybrid method (IBHM) is proposed. It is an asymmetric scheme to hybrid simple
compression methods. The decompression is achieved by instruction-based decoding. The input layout image is
partitioned into different fragments, compressed and encoded into instructions. On the MEBDW system side, the
encoded bit-stream is decoded by the IBHM decoder. The function of this decoder is to execute only a minimal number
of simple instructions, thus the decoder can be implemented with low gate-count on ASIC. Simulation results show that a
single IBHM decoder is capable of providing an output data rate as high as ~50 Gbps in various masking layers.
For better understanding of electron beam resist processes, it is important to characterize the resist materials on the basis
of their reaction mechanisms. In this study, the basic parameters which characterize the chemical reactions for latent
image formation upon exposure to electron beam were evaluated. The electron beam resist used was a chemically
amplified resist, the backbone polymer of which is poly(4-hydroxystyrene). 49% of the hydroxyl groups were protected
with t-butoxycarbonyl groups. The stopping power was 0.529 eV nm-1. The G-value of acid generation was 2.5. The
effective reaction radius for deprotection was approximately 0.02 nm. The diffusion constant of acids was 1.3 nm2 s-1.
The diffusion constant of quenchers was significantly lower than that of acids. The product of LER and chemical
gradient (dm/dx) was approximately 0.06.
Multiple e-beam direct write lithography (MEBDW), using >10,000 e-beams writing in parallel, proposed by
MAPPER, KLA-Tencor, and IMS is a potential solution for 20-nm half-pitch and beyond. The raster scan in MEBDW
makes bitmap its data format. Data handling becomes indispensable since bitmap needs a huge data volume due to the
fine pixel size to keep the CD accuracy after e-beam proximity correction (EPC). In fact, in 10,000-beam MEBDW, for a
10 WPH tool of 1-nm pixel size and 1-bit gray level, the aggregated data transmission rate would be up to 1963 Tera bits
per second (bps), requiring 19,630 fibers transmitting 10 Gbps in each fiber. The data rate per beam would be <20 Gbps.
Hence data reduction using bigger pixel size, fewer grey levels to achieve sub-nm EPC accuracy, and data truncation
have been extensively studied.
In this paper, process window assessment through Exposure-Defocus (E-D) Forest to quantitatively characterize the
data truncation before and after EPC is reported. REBL electron optics, electron scattering in resist, and resist acid
diffusion are considered, to construct the E-D Forest and to analyze the imaging performance of the most representative layers and patterns, such as critical line/space and hole layers with minimum pitch, cutting layers, and implant layers, for the 10-nm, and 7-nm nodes.
Maskless electron beam lithography can potentially extend semiconductor manufacturing to the 10 nm logic (16 nm half
pitch) technology node and beyond. KLA-Tencor is developing Reflective Electron Beam Lithography (REBL)
technology targeting high-volume 10 nm logic node performance. REBL uses a novel multi-column wafer writing
system combined with an advanced stage architecture to enable the throughput and resolution required for a NGL
system. Using a CMOS Digital Pattern Generator (DPG) chip with over one million microlenses, the system is capable
of maskless printing of arbitrary patterns with pixel redundancy and pixel-by-pixel grayscaling at the wafer. Electrons
are generated in a flood beam via a thermionic cathode at 50-100 keV and decelerated to illuminate the DPG chip. The
DPG-modulated electron beam is then reaccelerated and demagnified 80-100x onto the wafer to be printed.
Previously, KLA-Tencor reported on the development progress of the REBL tool for maskless lithography at and below
the 10 nm logic technology node. Since that time, the REBL team has made good progress towards developing the
REBL system and DPG for direct write lithography. REBL has been successful in manufacturing a CMOS controlled
DPG chip with a stable charge drain coating and with all segments functioning. This DPG chip consists of an array of
over one million electrostatic lenslets that can be switched on or off via CMOS voltages to pattern the flood electron
beam. Testing has proven the validity of the design with regards to lenslet performance, contrast, lifetime, and pattern
scrolling. This chip has been used in the REBL demonstration platform system for lithography on a moving stage in
both PMMA and chemically amplified resist. Direct imaging of the aerial image has also been performed by magnifying
the pattern at the wafer plane via a mag stack onto a YAG imaging screen. This paper will discuss the chip design
improvements and new charge drain coating that have resulted in a functional DPG chip and will evaluate the current
chip performance on the REBL system. Print results for line/space and device test patterns at the 100nm node will be