Multidimensional logarithmic number system (MDLNS) is a recently developed number representation that is very efficient for implementing the Inner Product Step Processor (IPSP). The MDLNS provides more degrees of freedom than the classical LNS by virtue of the orthogonal bases and ability to obtain reduction of hardware complexity from the use of multiple digits. This paper presents an analysis of errors introduced in data mapping from real numbers to 2-dimentional LNS (2-DLNS). Due to non-uniform error distribution, mapping space is divided by pre-assigned segments, where error performance can be uniquely characterized. Mapping errors are collected piece-wisely over all of the segments. In 1-digit 2-DLNS, error collection can be simplified by using pattern-matching scheme. Expressions for error variance are derived. It is shown that the use of a 2-DLNS representation results in significant lower error variance compared to floating-point number systems. The hardware complexity required with the error performance comparable to classic LNS can be significantly reduced due to smaller size of ROMs compared with LNS. The results of the error analysis have been verified by numerical simulations.