Requirements for increasingly integrated metrology solutions continue to drive applications that incorporate process
characterization tools, as well as the ability to improve metrology production capability and cycle time, with a single
application. All of the most critical device layers today, and even non-critical layers, now require optical proximity
correction (OPC), which must be rigorously modeled and calibrated as part of process development and extensively
verified once new product reticles are released using critical dimension-scanning electron microscopy (CD-SEM) tools.
Automatic setup of complex recipes is one of the major trends in CD-SEM applications, which is adding much value to
CD-SEM metrology. In addition, as integrated circuit dimensions and pitches continue to shrink, double patterning (DP)
has become more common. Thus automatic recipe setup has needed to incorporate capabilities to deal simultaneously
with two layers. This has the benefit of allowing the user to measure the two different CD populations and the image
shift in the lithography (i.e., the overlay). Thus automatic recipe creation can be used to characterize the DP pattern for
both CD and overlay.
DesignGauge, the automatic recipe utility for Hitachi CG series CD-SEMs, is not only capable of offline recipe creation,
but also can also directly transfer design-based recipes into standard CD-SEM recipes for use with DP processes. These
recipes can be used for OPC model-building and verification as with previous DesignGauge applications. The software
also provides design template-based recipe setup for production layer recipes, which improves production tool utilization,
as production recipes can thus be written offline for new products, improving first silicon cycle time, engineering time to
generate recipes, and CD-SEM utilization. Another benefit of the application is that recipes are more robust than with
conventional direct image-based pattern recognition. This paper explores the feasibility of matching a two-layer GDS
pattern to features in an image, allowing for the more complex measurements involved in DP characterization.
This work will evaluate DesignGauge with double litho double etch (DLDE DP), including rigorous tests of navigation,
pattern recognition success rates, SEM image placement, throughput of the recipe creation, recipe execution, and verification of proper measurements of the dual CD populations and overlay.
In this paper we present overlay measurement techniques that use small overlay targets for advanced semiconductor
applications. We employ two different optical methods to measure overlay using modified conventional optical
microscope platforms. They are scatterfield and through-focus scanning optical microscope (TSOM) imaging methods.
In the TSOM method a target is scanned through the focus of an optical microscope, simultaneously acquiring optical
images at different focal positions. The TSOM images are constructed using the through-focus optical images. Overlay
analysis is then performed using the TSOM images. In the scatterfield method, a small aperture is scanned at the
conjugate back focal plane of an optical microscope. This enables angle-resolved scatterometry on a high-magnification
optical platform. We also present evaluation of optical constants using the scatterfield method.
The conventional premise that metrology is a "non-value-added necessary evil" is a misleading and dangerous assertion,
which must be viewed as obsolete thinking. Many metrology applications are key enablers to traditionally labeled
"value-added" processing steps in lithography and etch, such that they can be considered integral parts of the processes.
Various key trends in modern, state-of-the-art processing such as optical proximity correction (OPC), design for
manufacturability (DFM), and advanced process control (APC) are based, at their hearts, on the assumption of fine-tuned
metrology, in terms of uncertainty and accuracy. These trends are vehicles where metrology thus has large opportunities
to create value through the engineering of tight and targetable process distributions. Such distributions make possible
predictability in speed-sorts and in other parameters, which results in high-end product. Additionally, significant reliance
has also been placed on defect metrology to predict, improve, and reduce yield variability. The necessary quality
metrology is strongly influenced by not only the choice of equipment, but also the quality application of these tools in a
production environment. The ultimate value added by metrology is a result of quality tools run by a quality metrology
team using quality practices.
This paper will explore the relationships among present and future trends and challenges in metrology, including
equipment, key applications, and metrology deployment in the manufacturing flow. Of key importance are metrology
personnel, with their expertise, practices, and metrics in achieving and maintaining the required level of metrology
performance, including where precision, matching, and accuracy fit into these considerations. The value of metrology
will be demonstrated to have shifted to "key enabler of large revenues," debunking the out-of-date premise that
metrology is "non-value-added." Examples used will be from critical dimension (CD) metrology, overlay, films, and
Patterns of lines and trenches with nominal linewidths of 50 nm have been proposed for use as an overlay target
appropriate for placement inside the patterned wafer die. The National Institute of Standards and Technology (NIST)
Scatterfield Targets feature groupings of eight lines and/or trenches which are not resolvable using visible-wavelength
bright-field microscopy. Such repetitive patterns yield zero-order images superimposed by interference effects from
these finite gratings. Zero-order imaging is defined as the collection of specular reflection from periodic structures
without the collection of any possible diffracted beams. As our lines and trenches are formed in different
photolithographic steps, the overlay offset can be derived from the relative displacement of these zero-order responses.
Modeling this phenomenon will require a thorough characterization of the transmission of light through all points in the
optical path as a function of position, angle, and polarization. Linear polarization parallel and perpendicular to these
lines and trenches is investigated as a possible enhancer of overlay offset measurement repeatability. In our particular
case, nominally unpolarized light proved most repeatable.
As the trends in integrated circuit fabrication follow Moore's Law to smaller feature sizes, one trend seen in lithographic technology is the continually increasing use of optical enhancements such as Optical Proximity Correction (OPC). Small size perturbations are designed into the nominal feature shapes on the reticle such that the intended shape is printed. Verifying the success of OPC is critical to ramp-up and production of new process technologies. CD-SEMs are imaging tools which are capable of measuring feature sizes in any part of a chip, either in a test structure or within a circuit. A new trend in CD-SEM utilization is the implementation of automated recipe generation of complex CD-SEM recipes. The DesignGauge system uses design-to-SEM recipe creation and data collection. Once the recipe creation flow is implemented, the task of recipe creation can be accomplished within minutes. These applications enable a CD-SEM to be utilized to collect data for very complex OPC CD-SEM recipe runs which measure many different unique linewidths, spaces, and pattern placements within a circuit to check OPC success and lithographic fidelity. The data collection can provide accurate data results that can be utilized for comparing achieved feature measurements to nominal values from the design layout. This new application adds much value to the CD-SEM compared to other technologies such as OCD, as it completes the evaluation of in-circuit behavior to test structures in a scribe lane, something OCD currently cannot do. The present work evaluates the capabilities of DesignGauge, which is available for the latest-generation Hitachi S-9380II CD-SEMs. The evaluation includes rigorous tests of navigation, pattern recognition success rates, SEM image placement, throughput of recipe creation and recipe execution.
There are numerous metrology challenges facing photolithography for the 45 nm technology node and beyond in the
areas of critical dimension (CD), overlay and defect metrology. Many of these challenges are identified in the 2005
<i>International Technology Roadmap for Semiconductors </i>(ITRS) . The Lithography and Metrology sections of the
ITRS call for measurement of 45/32/22/18 nm generation linewidth and overlay. Each subsequent technology generation
requires less variation in CD linewidth and overlay control, which results in a continuing need for improved metrology
precision. In addition, there is an increasing need to understand individual edge variation and edge placement errors
relative to the intended design. This is accelerating the need for new methods of CD and overlay measurement, as well
as new target structures. This paper will provide a comprehensive overview of the CD and overlay metrology challenges
for photolithography, taking into account the areas addressed in the 2005 ITRS for the 45 nm technology generation and
The National Institute of Standards and Technology (NIST) and The International Sematech Manufacturing Initiative
(ISMI) have been involved in a project to evaluate the accuracy of optical overlay measurements in the presence of
measurement target asymmetries created by typical wafer processing. The ultimate goal of this project is to produce a
method of calibrating optical overlay measurements on typical logic and memory production stacks. A method of
performing accurate CD-SEM and CD-AFM overlay measurements is first presented. These measurements are then
compared to optical overlay measurements of the same structures to assess the accuracy of the optical measurements.
Novel image rotation tests were also performed on these structures to develop a method to decouple errors from
metrology target asymmetries and measurement system optical asymmetries.
An overview of the challenges encountered in imaging device-sized features using optical techniques recently developed in
our laboratories is presented in this paper. We have developed a set of techniques we refer to as scatterfield microscopy
which allows us to engineer the illumination in combination with appropriately designed metrology targets. The techniques
have previously been applied to samples with sub-50 nm sized features having pitches larger than the conventional Rayleigh
resolution criterion which results in images having edge contrast and elements of conventional imaging. In this paper we
extend these methods to targets composed of features much denser than the conventional Rayleigh resolution criterion. For
these applications, a new approach is presented which uses a combination of zero order optical response and edge-based
imaging. The approach is, however, more general and a series of analyses based on theoretical methods is presented. This
analysis gives a direct measure of the ultimate size and density of features which can be measured with these techniques and
addresses what measurement resolution can be obtained. We present several experimental results, optical simulations using
different electromagnetic scattering packages, and statistical analyses to evaluate the ultimate sensitivity and extensibility of