Laser dies in an optical power range of 1-3 Watts are widely assembled in popular TO- packages. TO-packages suffer
from high thermal resistance and limited output power. Bad thermal contact between circuit boards and TO-devices can
cause overheating of laser chips, significantly reducing the operating life time. We developed a compact high heat-load
SMT package for an optical power up to 7 Watts in CW operation with good life time results.
The new package for high power laser chips combines highly efficient heat dissipation with Surface-mount technology.
A Direct-Bonded-Copper (DBC) substrate acts as a base plate for the laser chip and heat sink. The attached frame is used
for electrical contacting and acts as beam reflector where the laser light is reflected at a 45° mirror. In the application the
DBC base plate of the SMT-Laser is directly soldered to a Metal-Core-PCB by reflow soldering. The overall thermal
resistance from laser chip to the bottom of a MC-PCB was measured as low as 2.5 K/W. The device placement process
can be operated by modern high-speed mounting equipment. The direct link between device and MC-PCB allows CW
laser operation up to 6-7 watts at wavelengths of 808nm to 940nm without facing any overheating symptom like thermal
roll over. The device is suitable for CW and QCW operation. In pulsed operation short rise and fall times of <2ns have
New application fields like infrared illumination for sensing purposes in the automotive industry and 3D imaging
systems could be opened by this new technology.
The complete integration of photonic devices into a CMOS process flow will enable low cost photonic functionality
within electronic circuits. BAE Systems, Lucent Technologies, Massachusetts Institute of Technology, Cornell
University, and Applied Wave Research are participating in a high payoff research and development program for the
Microsystems Technology Office (MTO) of DARPA. The goal of the program is the development of technologies and
design tools necessary to fabricate an application specific, electronic-photonic integrated circuit (AS-EPIC). The first
phase of the program was dedicated to photonics device designs, CMOS process flow integration, and basic electronic
functionality. We will present the latest results on the performance of waveguide integrated detectors, and tunable
Laterial p-i-n photodiodes have been produced in a standard, unmodified commercial GaAs integrated circuit process (Vitesse Semiconductor Inc. HGaAs IV and V). The devices were modelled using the MEDICI simulation package, achieving a very good fit to both capacitance and DC light response measuremnts. The simulation recreated an interesting feature of the devices, wherein the detectors go from a low-performance to high-performance regime abruptly at a specific reverse bias. An analysis of the simulated behavior of the depletion region in the nominally intrinsic region of the device provided a partial answer to the physics behind this bias point. A second generation of devices of different geometries was fabricated and tested. The newer fabrication process showed a lower performance transition (~0.6 V) than the previous process (~4 V) for an identical layout geometry. Preliminary high-speed measurements of the newer devices are quite encouraging.