Wojtek J. Poppe
at NVIDIA
SPIE Involvement:
Author
Publications (11)

Proceedings Article | 13 March 2009 Paper
Proc. SPIE. 7275, Design for Manufacturability through Design-Process Integration III
KEYWORDS: Etching, Semiconducting wafers, Resistance, Design for manufacturing, Lithography, Process control, Photomasks, Structural design, Metrology, Calibration

Proceedings Article | 18 March 2008 Paper
Proc. SPIE. 6925, Design for Manufacturability through Design-Process Integration II
KEYWORDS: Oscillators, Lithography, Device simulation, Design for manufacturing, Transistors, Phase shifts, Semiconducting wafers, Instrument modeling, Manufacturing, Circuit switching

Proceedings Article | 1 November 2007 Paper
Proc. SPIE. 6730, Photomask Technology 2007
KEYWORDS: Databases, Transistors, Data analysis, Data modeling, Process modeling, Data storage, Critical dimension metrology, Internet, Semiconducting wafers, Data mining

Proceedings Article | 28 March 2007 Paper
Proc. SPIE. 6520, Optical Microlithography XX
KEYWORDS: Transistors, Line width roughness, Lithography, Critical dimension metrology, Databases, Semiconducting wafers, Structural design, Cryogenics, Photomasks, Metals

Proceedings Article | 28 March 2007 Paper
Proc. SPIE. 6521, Design for Manufacturability through Design-Process Integration
KEYWORDS: Design for manufacturing, Photomasks, Device simulation, Computer aided design, Process modeling, Etching, Monochromatic aberrations, Manufacturing, Lithography, Chemical mechanical planarization

Showing 5 of 11 publications
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