Mr. Won-Kwang Ma Profile

Won-Kwang Ma

at SK Hynix Inc

SPIE Involvement:

Author

Publications (10)

Proceedings Article | 26 March 2010 Paper

Topcoat-less resist process for 2Xnm node devices

Changil Oh, Junghyung Lee, Junggun Heo, Hyunkyung Shim, Keundo Ban, Cheolkyu Bok, Donggyu Yim, Sungki Park

Proceedings Volume 7639, 76393A (2010) https://doi.org/10.1117/12.846707

KEYWORDS: Photoresist processing, Line width roughness, Immersion lithography, Scanners, Optical lithography, Bridges, Semiconducting wafers, Etching, Photomasks, Materials processing

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Proceedings Article | 24 March 2008 Paper

Alignment system and process optimization for improvement of double patterning overlay

Won-kwang Ma, Jung-hyun Kang, Chang-moon Lim, HyeongSoo Kim, Seung-chan Moon, Sanjay Lalbahadoersing, Seung-chul Oh

Proceedings Volume 6922, 69222T (2008) https://doi.org/10.1117/12.772474

KEYWORDS: Photomasks, Double patterning technology, Semiconducting wafers, Overlay metrology, Etching, Lithography, Extreme ultraviolet, Data modeling, Reticles, Optical alignment

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Proceedings Article | 12 April 2007 Paper

Improvement of front-end process overlay in 60nm DRAM

Young-Sun Hwang, Won-Kwang Ma, Eung-Kil Kang, Chang-Moon Lim, Seung-Chan Moon, Sang-Jin An, Kyu-Kab Rhe

Proceedings Volume 6518, 65182Y (2007) https://doi.org/10.1117/12.712025

KEYWORDS: Overlay metrology, Optical alignment, Semiconducting wafers, Signal processing, Chemical mechanical planarization, Double patterning technology, Resolution enhancement technologies, Thermal effects, Lithography, Process control

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ArF immersion lithography and RETs (Resolution Enhancement Technology) are the most promising technology for sub 60nm patterning. As the device size shrinks, overlay accuracy has become more important due to small overlap margin between layers. Overlay performance of immersion process is affected by thermal effect due to water evaporation, so it shows worse performance than dry process and CD variation in DPT (Double Patterning Technology) process is affected by overlay performance. So improvement of overlay accuracy became hot issue in realization of future lithography technology, especially immersion process and double patterning process. Current status of lithography tool shows 10 ~ 12nm (3sigma) overlay control in front-end process, but this overlay performance is not sufficient for future technology. In this paper, we investigated the causes of overlay variation and tried to improve overlay accuracy in front-end process of 60nm DRAM device. Therefore, the results in this study can be implemented to new technology such as immersion and double patterning. First, overlay residual error factor is classified into two types, one is the equipment error factor and the other is process error factor. Equipment error can be divided into SCMV (Single Chuck Mean Variation) by stage accuracy variation, chuck to chuck mean and correction factor variation by using twin chuck etc. And process error can be divided into alignment signal variation by chuck defocus (stage particle by contamination), increase of overlay residual by material deposition, alignment key height variation by etch loading effect, overlay vernier attack by CMP (Chemical Mechanical Polishing) process etc. We analyzed causes of these overlay error factor and we applied new system and process to improve these overlay error factor. In conclusion, we were able to find where overlay error comes from and how to improve overlay accuracy in 60nm device, and we got good overlay performance using new alignment system and process optimization.

Proceedings Article | 5 April 2007 Paper

Hardware, materials, and parameters optimization for improvement of immersion overlay

Won-Kwang Ma, Young-sun Hwang, Eung-kil Kang, Sarohan Park, Jung-Hyun Kang, Chang-moon Lim, Seung-chan Moon

Proceedings Volume 6518, 65182Z (2007) https://doi.org/10.1117/12.712026

KEYWORDS: Semiconducting wafers, Thin film coatings, Overlay metrology, Optical alignment, Immersion lithography, Materials processing, Scanners, Protactinium, Calibration, Photomasks

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Proceedings Article | 12 May 2005 Paper

Study on the shoreline for water immersion ArF lithography

Chang-Moon Lim, Tae-Seung Eom, Seo-Min Kim, Cheolkyu Bok, Won-Kwang Ma, Gyu-Dong Park, Seung-Chan Moon, Jin-Woong Kim

Proceedings Volume 5754, (2005) https://doi.org/10.1117/12.600455

KEYWORDS: Lithography, Immersion lithography, Lithographic illumination, Semiconducting wafers, Diffraction, Critical dimension metrology, Reliability, Refractive index, Scanning electron microscopy, Contamination

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Proceedings Article | 28 May 2004 Paper

Double exposure to reduce overall line-width variation of 80-nm DRAM gate

Won Ma, Chang-Moon Lim, Se Oh, Byung Nam, Seung Chan Moon, Ki Shin

Proceedings Volume 5377, (2004) https://doi.org/10.1117/12.536358

KEYWORDS: Critical dimension metrology, Semiconducting wafers, Lithography, Optical proximity correction, Transistors, Scanners, Neck, Wafer-level optics, Optical calibration, Fiber optic illuminators

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Proceedings Article | 26 June 2003 Paper

Comparative study of chromeless and attenuated phase-shift mask for 0.3-k1 ArF lithography of DRAM

Tae-Seung Eom, Chang Lim, Seo-Min Kim, Hee-Bom Kim, Se-Young Oh, Won-Kwang Ma, Seung-Chan Moon, Ki Shin

Proceedings Volume 5040, (2003) https://doi.org/10.1117/12.485452

KEYWORDS: Photomasks, Lithography, Transmittance, Phase shifts, Diffraction, Quartz, Mask making, Etching, Optical lithography, Critical dimension metrology

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Proceedings Article | 30 July 2002 Paper

Defect printability and specification of ArF mask in repeating feature

Wan-Ho Kim, Won-Kwang Ma, Hee-Bom Kim

Proceedings Volume 4691, (2002) https://doi.org/10.1117/12.474518

KEYWORDS: Photomasks, Semiconducting wafers, Inspection, Printing, Lithography, Manufacturing, Photoresist processing, Cadmium, Diffusion, Semiconductors

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Proceedings Article | 30 July 2002 Paper

Optical lithography simulation considering impact of mask errors

Hee-Bom Kim, Won-Kwang Ma, Chang-Nam Ahn, Ki-Soo Shin

Proceedings Volume 4691, (2002) https://doi.org/10.1117/12.474508

KEYWORDS: Photomasks, Optical proximity correction, Optical lithography, Semiconducting wafers, Image processing, Solid modeling, Scanning electron microscopy, Mask making, Point spread functions, Optical simulations

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Proceedings Article | 11 March 2002 Paper

Impact on wafer process of sub-120-nm design rule mask

Young-Mog Ham, Sang-Sool Koo, Sang Kim, Won-Kwang Ma, Ki-Soo Shin

Proceedings Volume 4562, (2002) https://doi.org/10.1117/12.458258

KEYWORDS: Photomasks, Critical dimension metrology, Semiconducting wafers, Mask making, Lithography, Optical lithography, Optical proximity correction, Process control, Chemical mechanical planarization, Electron beam lithography

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Showing 5 of 10 publications

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