Prevention of integrated circuit counterfeiting through logic locking faces the fundamental challenge of securing an obfuscation key against physical and algorithmic threats. Previous work has focused on strengthening the logic encryption to protect the key against algorithmic attacks but failed to provide adequate physical security. In this work, we propose a logic locking scheme that leverages the non-volatility of the nanomagnet logic (NML) family to achieve both physical and algorithmic security. Polymorphic NML minority gates protect the obfuscation key against algorithmic attacks, while a strain-inducing shield surrounding the nanomagnets provides physical security via a self-destruction mechanism, securing against invasive attacks. We experimentally demonstrate that shielded magnetic domains are indistinguishable, securing against imaging attacks. As NML suffers from low speeds, we propose a hybrid CMOS logic scheme with embedded obfuscated NML “islands”. The NML secures the functionality of sensitive logic while CMOS drives the timing-critical paths.
We propose a four-terminal domain wall-magnetic tunnel junction (DW-MTJ) neuron that enables the first-ever purely spintronic multilayer perceptron with unsupervised learning. The leaky integrate-and-fire neuron has a ferromagnetic DW track coupled to a binary MTJ by an electrically insulated layer. Current through the DW track performs integration by moving the DW. Leaking occurs by moving the DW in the opposite direction of integration due to either dipolar magnetic field, anisotropy gradient, or shape variation. When the DW passes underneath the MTJ, it fires by switching between the resistive and conductive states.
In a crossbar perceptron, the DW track of each neuron is connected to the analog three-terminal DW-MTJ synapses and the MTJ terminals cascade multiple layers. Finally, an unsupervised learning algorithm results from the feedback between the neuron MTJ and the analog synapses, providing best results of 98.11% accuracy on the Wisconsin breast cancer clustering task.
Magnetic domain-wall devices, modulated by the spin-transfer torque or the spin-orbit torque effect, can implement logical operations in a manner that is inherently compact and cascadable. Using circuit simulations with micromagnetics-validated compact models, we evaluate the device requirements for domain-wall logic that has low latency, outperforms scaled CMOS logic in energy efficiency, and remains robust to process variations. We further show how the inherent non-volatility of these devices can be leveraged to construct stateful logic circuits that save energy and area relative to their CMOS counterparts and propose novel logic architectures that exploit the unique advantages of domain-wall devices.
Advances in machine intelligence have sparked interest in hardware accelerators to implement these algorithms, yet embedded electronics have stringent power, area budgets, and speed requirements that may limit non- volatile memory (NVM) integration. In this context, the development of fast nanomagnetic neural networks using minimal training data is attractive. Here, we extend an inference-only proposal using the intrinsic physics of domain-wall MTJ (DW-MTJ) neurons for online learning to implement fully unsupervised pattern recognition operation, using winner-take-all networks that contain either random or plastic synapses (weights). Meanwhile, a read-out layer trains in a supervised fashion. We find our proposed design can approach state-of-the-art success on the task relative to competing memristive neural network proposals, while eliminating much of the area and energy overhead that would typically be required to build the neuronal layers with CMOS devices.
The challenge of developing an efficient artificial neuron is impeded by the use of external CMOS circuits to perform leaking and lateral inhibition. The proposed leaky integrate-and-fire neuron based on the three terminal magnetic tunnel junction (3T-MTJ) performs integration by pushing its domain wall (DW) with spin-transfer or spin-orbit torque. The leaking capability is achieved by pushing the neurons’ DWs in the direction opposite of integration using a stray field from a hard ferromagnet or a non-uniform energy landscape resulting from shape or anisotropy variation. Firing is performed by the MTJ stack. Finally, analog lateral inhibition is achieved by dipolar field repulsive coupling from each neuron. An integrating neuron thus pushes slower neighboring neurons’ DWs in the direction opposite of integration. Applying this lateral inhibition to a ten-neuron output layer within a neuromorphic crossbar structure enables the identification of handwritten digits with 94% accuracy.
Spintronics is widely explored as a replacement of CMOS for next-generation computing systems. In particular, magnetic skyrmions efficiently carry information due to their topological stability, non-volatility, low-current motion, and small size. Here we propose a skyrmion logic system that includes a direct cascading mechanism, enabling the implementation of large-scale skyrmion computing systems. This system leverages the rich physics of magnetic skyrmions, including the spin-Hall effect, skyrmion-Hall effect, skyrmion-skyrmion repulsion, repulsion between skyrmions and the track boundaries, and electrical current-control of notch depinning. A force generated by the spin-Hall effect moves skyrmions within ferromagnetic tracks due to repulsion from the track boundaries, and the interplay between the skyrmion-Hall effect and skyrmion-skyrmion repulsion enable logical operations at track junctions. Direct cascading is achieved by using the output skyrmions of one logic gate as inputs to other logic gates. To ensure correct functionality and enable large-scale systems, a global clock provides periodic current pulses in order to the synchronize skyrmion motion past notches in the track. In this conservative logic system, skyrmions are never destroyed during logical operations, thus eliminating the need to generate skyrmions, reducing energy consumption, and simplifying experimental demonstration.