A superscalar pipeline applied Tomasulo’s algorithm is presented in this paper. The design begins with a dual-issue superscalar processor based on LEON2. Tomasulo’s algorithm is adopted to implement out-of-order execution. Instructions are separated into three different parts and executed by three different function units so as to reduce area and promote execution speed. Results wrote back into registers are still in program order, for the aim of ensure the function veracity. Mechanisms of the reservation station, common data bus, and reorder buffer are presented in detail. The structure can sends and executes three instructions at most at a time. Branch prediction can also be realized by reorder buffer. Performance of the scalar pipeline applied Tomasulo’s algorithm is promoted by 41.31% compared to singleissue pipeline..