EUV lithography has been adopted in most advanced semiconductor manufacture fabs, enabling the next step in design rule scaling. With this progress, minimum critical defect size has become smaller and harder to detect. Defect inspection equipment suppliers must therefore in parallel provide a significant step up in inspection sensitivity at a reasonable throughput. Optical inspection tools are facing an unprecedented challenge because defects less than 10nm are not optically visible. As an alternative, semiconductor manufacturers have turned toward e-beam inspection. E-beam inspection is widely used in R&D to shorten development cycle-time and selectively used in high volume manufacturing (HVM) for process monitoring, however currently it is not fast enough for large-scale replacement of optical inspection. Our approach to address this shortcoming is to combine cutting edge multiple-beam technology with a cutting edge positioning system/computation architecture to create a next generation e-beam inspection system capable of scanning with multiple electron beams at the same time. This paper reports on the progress in developing such a system as well as future multi-beam inspection applications.
With technology node shrinking to 7nm and beyond, EUV lithography has been adopted in most of the advanced manufacture fab. This made the killer defect size become even smaller on both wafer and mask. The optical inspection can’t meet the sensitivity requirement, so e-beam inspection is widely used during wafer fabrication, and started to be used in pattern mask inspection (PMI). However, the drawback of e-beam inspection is low throughput. To achieve both good sensitivity and high throughput, we are developing multiple beam inspector(MBI) to meet industry’s need for EUV lithography. In this paper, we discussed e-beam pattern mask inspection(PMI) and wafer inspection, introduced our most advanced multiple beam technology and next generation multiple beam inspector (MBI) development. We have successfully got 9 images on primary beam module, and also images from secondary electron projection module. We also discussed related technologies, e.g. computation and fast stage technology to further improve throughput and lower COO. At last MBI new applications are discussed.
In this paper, we focus on our most advanced multiple beam technology and next generation multiple beam inspector(MBI) development. We have successfully got 9 images on primary beam module, proving our design concept is correct. We also discussed related technologies, e.g. Computation and fast stage technology to further improve throughput and lower COO. At last MBI new applications are discussed.
In this paper, we discuss the metrology methods and error budget that describe the edge placement error (EPE). EPE quantifies the pattern fidelity of a device structure made in a multi-patterning scheme. Here the pattern is the result of a sequence of lithography and etching steps, and consequently the contour of the final pattern contains error sources of the different process steps. EPE is computed by combining optical and ebeam metrology data. We show that high NA optical scatterometer can be used to densely measure in device CD and overlay errors. Large field e-beam system enables massive CD metrology which is used to characterize the local CD error. Local CD distribution needs to be characterized beyond 6 sigma, and requires high throughput e-beam system. We present in this paper the first images of a multi-beam e-beam inspection system. We discuss our holistic patterning optimization approach to understand and minimize the EPE of the final pattern. As a use case, we evaluated a 5-nm logic patterning process based on Self-Aligned-QuadruplePatterning (SAQP) using ArF lithography, combined with line cut exposures using EUV lithography.