For the problems of few samples, serious unbalanced categories and small defect scale of catenary cotter pin, a detection method based on three-level cascade architecture and attention mechanism is proposed. First of all, to alleviate the problem of inaccurate location caused by the small size of the cotter pin, the deep residual location network was constructed, and the atrous convolution layers of different sizes were introduced, which not only avoided the loss of internal data structure, but also preserved the hierarchical context feature. Secondly, a lightweight generative adversarial network that is sensitive to the difference of image local features is constructed to generate defect samples. Therefore, the problem of over-fitting and poor generalization performance of the detection network due to few samples and unbalanced categories is alleviated. Finally, in order to further alleviate the problem of small defect scale, the attention mechanism is adopted to learn different weights from channel domain, so as to obtain more important feature information and improve the accuracy of the detection network. Comparing the proposed method and its variant on dataset, the results show that the three-level cascade architecture proposed has certain advantages, and can alleviate the problems of few samples, unbalanced categories and small target scale.
Based on polarization independent optical splitters and beam splitters, a new logic gate design method based on self collimation effect is proposed. Using the characteristics of light self-collimation transmission in the photonic crystal, combined with the optical splitter, the optical path difference is introduced, so that the corresponding phase difference between the incident light is generated. It makes the light beam produce interference effect at the beam splitter converge, so as to realize the logic function of NOR gate, NAND gate and XOR gate. Simultaneously, the plane wave expansion method and the finite difference time domain method are used to simulate and analyze the logic gate in the TM polarization mode to verify its logic function. The analysis of the results shows that the logic gate designed by self-collimation effect and linear interference is compact, smaller in size, easy to manufacture, short in time response, high in transmittance, and more suitable for the development of optical integration.
Based on the ring resonator and microcavity, this paper designs a new method for realizing all-optical logic gates. Firstly, manufacture defects in complete triangular lattice silicon to produce waveguide coupling and linear interference effect. Secondly, the proposed structure was simulated by plane wave expansion method and finite difference time domain method. Finally, view the simulation results and analyze the performance index parameters of the proposed all-optical logic gate in combination with experimental data. The results show that the extinction ratio of the proposed all-optical logic AND gate can reach 8dB, the structure size is small, the response time can reach 2.42ps. At the same time, the value of the proposed all-optical logic OR gate output can reach 0.72, the structure size is small, and the response time can reach 2.41ps. The performance is favorable and meets the experimental requirements.
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