All chipmakers understand that variability is the enemy of any process and that defectivity reduction is essential to improving yield which translates to profit. Aggressive process window and yield specifications put tight requirements on the DUV light source which will impact scanner imaging performance. Accurate identification of defectivity caused by on wafer hotspots along with the impact on process windows can be accomplished using existing industry capability. ASML’s Brion Lithography Manufacturing Checker (LMC) can be employed using existing models to perform hotspot analysis and verify process window impact for current and future 193 nm nodes.
In this presentation, we review a methodology to understand the effect bandwidth variation has on hotspot variability and defect variation on specific customer designs. Initial studies are based on a large number of customer specific 90 nm pitch layouts where bandwidth variability is investigated for its impact on hotspot variability. Defect density maps are generated from the baseline process with additional maps generated at various bandwidth ranges. This methodology has been applied to Cymer’s DynaPulse and new DynaPulse2 bandwidth control technologies demonstrating the impact that bandwidth variation can influence process defectivity levels.
Demand for mask process correction (MPC) is growing for leading-edge process nodes. MPC was originally intended to
correct CD linearity for narrow assist features difficult to resolve on a photomask without any correction, but it has been
extended to main features as process nodes have been shrinking.
As past papers have observed, MPC shows improvements in photomask fidelity. Using advanced shape and dose
corrections could give more improvements, especially at line-ends and corners. However, there is a dilemma on using
such advanced corrections on full mask level because it increases data volume and run time. In addition, write time on
variable shaped beam (VSB) writers also increases as the number of shots increases.
Optical proximity correction (OPC) care-area defines circuit design locations that require high mask fidelity under mask
writing process variations such as energy fluctuation. It is useful for MPC to switch its correction strategy and permit the
use of advanced mask correction techniques in those local care-areas where they provide maximum wafer benefits. The
use of mask correction techniques tailored to localized post-OPC design can result in similar desired level of data
volume, run time, and write time. ASML Brion and NCS have jointly developed a method to feedforward the care-area
information from Tachyon LMC to NDE-MPC to provide real benefit for improving both mask writing and wafer
This paper explains the detail of OPC care-area feedforwarding to MPC between ASML Brion and NCS, and shows the
results. In addition, improvements on mask and wafer simulations are also shown. The results indicate that the worst
process variation (PV) bands are reduced up to 37% for a 10nm tech node metal case.
Process-window (PW) evaluation is critical to assess the lithography process quality and limitations. Usual CD-based PW gives only a partial answer. Simulations such as Tachyon LMC (Lithography Manufacturability Check) can efficiently overcome this limitation by analyzing the entire predicted resist contours. But so far experimental measurements did not allow such flexibility. This paper shows an innovative experimental flow, which allows the user to directly validate LMC results across PW for a select group of reference patterns, thereby overcoming the limitations found in the traditional CD-based PW analysis. To evaluate the process window on wafer more accurately, we take advantage of design based metrology and extract experimental contours from the CD-SEM measurements. Then we implement an area metric to quantify the area coverage of the experimental contours with respect to the intended ones, using a defined “sectorization” for the logic structures. This ‘sectorization’ aims to differentiate specific areas on the logic structures being analyzed, such as corners, line-ends, short and long lines. This way, a complete evaluation of the information contained in each CD-SEM picture is performed, without having to discard any information. This solution doesn’t look at the area coverage of an entire feature, but uses a ‘sectorization’ to differentiate specific feature areas such as corners, line-ends, short and long lines, and thus look at those area coverages. An assessment of resist model/OPC quality/process quality at sub nm-level accuracy is rendered possible.
We report progress in the development of polymer waveguides and devices for photonic applications in three areas: non-photolithographic techniques for polymer waveguide fabrication, bistability in laterally-coupled polymer microring resonators, and ultrafast photoconductive switches fabricated from semiconducting polymers. The non-photolithographic techniques for waveguide fabrication under development include laser milling with an excimer laser and programmable automatic dispensing of multimode polymer waveguides using an Essemtech automatic dispenser. Asymmetric diffraction gratings fabricated using phase masks and the interference of two excimer laser beams have exhibited concentration of optical power into the 1st diffraction order. Polymer micro-ring resonators laterally coupled to a bus line were fabricated by lithography from benzocyclobutene with radii as small as 10 μm and free spectral ranges on the order of 20 nm. These devices exhibit bistability in the frequency domain which can arise from thermal or nonlinear optical changes in refractive index and that may have application for all-optical switching. Metal-polymer-metal switches fabricated with interdigitated electrodes in an inverted structure exhibited fast transient photoconductive pulsewidths under 20 ps in response to femtosecond pump laser pulses, but the measurement was bandwidth limited by the oscilloscope. Here we report pump-probe measurements that indicate carrier lifetimes on the order of 2 ps.