Dr. Yongchan Ban
Senior Member of Technical Staff at GLOBALFOUNDRIES
SPIE Involvement:
Author
Publications (15)

PROCEEDINGS ARTICLE | March 28, 2017
Proc. SPIE. 10148, Design-Process-Technology Co-optimization for Manufacturability XI
KEYWORDS: Logic, Switching, Metals, Reliability, Resistance, Power supplies, Capacitance, Design for manufacturing, Transistors, Integrated circuit design, Electronic design automation, Inductance

PROCEEDINGS ARTICLE | March 16, 2016
Proc. SPIE. 9781, Design-Process-Technology Co-optimization for Manufacturability X
KEYWORDS: Oxides, Etching, Metals, Copper, Manufacturing, Resistance, Capacitance, Design for manufacturing, Semiconducting wafers, Model-based design, Chemical mechanical planarization, Design for manufacturability

SPIE Journal Paper | December 4, 2014
JM3 Vol. 14 Issue 01
KEYWORDS: Photomasks, Metals, Lithography, Optical lithography, Double patterning technology, Semiconducting wafers, Manufacturing, Logic, Optical proximity correction, Lithographic illumination

PROCEEDINGS ARTICLE | March 28, 2014
Proc. SPIE. 9053, Design-Process-Technology Co-optimization for Manufacturability VIII
KEYWORDS: Lithography, Logic, Clocks, Etching, Metals, Resistance, Signal processing, Design for manufacturing, Chemical mechanical planarization

PROCEEDINGS ARTICLE | March 28, 2014
Proc. SPIE. 9053, Design-Process-Technology Co-optimization for Manufacturability VIII
KEYWORDS: Semiconductors, Lithography, Optical lithography, Manufacturing, Reliability, Design for manufacturing, Transistors, Yield improvement, Device simulation

PROCEEDINGS ARTICLE | April 4, 2011
Proc. SPIE. 7974, Design for Manufacturability through Design-Process Integration V
KEYWORDS: Lithography, Logic, Optical lithography, Lithographic illumination, Etching, Metals, Manufacturing, Photomasks, Double patterning technology, Semiconducting wafers

Showing 5 of 15 publications
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