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The main work of the paper is the simulation of all-optical logic gates and optical SR latch. The logic gate setup only uses one SOA, but it can get two different logic gates through a simulation. The extinction ratio of the logic gate is about 30dB. The structure of optical SR latch utilizes the two coupled polarization rotation switch of SOA. The structure of the flip-flop is based on these two parts. To demonstrate the feasibility of the structure, we analyze two types of flip-flops, including all-optical D and T flip-flops, whose clock pulse repetition rate is 1GHz with the pulse width of 0.3ns. The quality of all-optical flip-flop in this paper is measured by the falling and rising edge time. In the simulation, the falling edge time is about 50ps, while the rising edge time is higher than the falling edge time, because the gain increases slowly to the recovery time after the decrease of the gain of SOA. The results are useful for the development of all-optical flip-flop based on SOA.
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