Projection lithography using extreme ultraviolet (EUV) light at 13.5-nm wavelength will be applied to the production of integrated circuits below 7-nm design rules. In pursuit of further miniaturization, however, stochastic pattern defect problems have arisen, and monitoring such defect generation probabilities in extremely low range (<10 − 10) is indispensable. We discuss a method for predicting stochastic defect probabilities from a histogram of feature sizes for patterns several orders of magnitude fewer than the number of features to inspect. Based on our previously introduced probabilistic model of stochastic pattern defect, the defect probability is expressed as the product sum of the probability for edge position and the probability that film defect covers the area between edges, and we describe the latter as a function of edge position. The defect probabilities in the order between 10 − 7 and 10 − 5 were predicted from 105 measurement data for real EUV-exposed wafers, suggesting the effectiveness of the model and its potential for defect inspection.
As industry prepares to introduce extreme ultraviolet (EUV) technology for the coming sub-10-nm lithography, this paper presents metrology approaches that utilize the prevalent Critical Dimension Scanning Electron Microscope (CD-SEM). Two technical approaches will be discussed. One is comprehensive solutions for new EUV characterized features, such as low resist-shrinkage electron beam optics and high efficiency metrology/inspection for EUV process monitoring. The other, like conventional minimization processes, is down-to-ångström-order metrology methodologies required for stricter CD process control. This paper is the first to conceptualize specifications for a stringent and multi-index tool matching, namely “atomic matching,” which is considered as a crucially important feature of any in-line metrology tools in the EUV era.
A CD-SEM metrology for an EUV resist that was compatible with low shrinkage and high spatial resolution was investigated by using primary electrons (PEs) with high energy. The shrinkage and an image sharpness were evaluated for the EUV resist using PEs with energies of 200, 800, and 4000 eV. As a result, the smallest shrinkage and image sharpness were obtained under the condition of PEs with an energy of 4000 eV. We believe that a high-voltage CD-SEM is a potential candidate for CD metrology tools in the EUV lithography era.
Measurement of line edge roughness (LER) is discussed from four aspects: edge detection, power spectrum densities (PSD) prediction, sampling strategy, and noise mitigation. General guidelines and practical solutions for LER measurement today are introduced. Advanced edge detection algorithms such as the wave-matching method are shown to be effective for robustly detecting edges from low SNR images, whereas a conventional algorithm with weak filtering is still effective in suppressing SEM noise and aliasing. An advanced PSD prediction method such as the multitaper method is effective in suppressing sampling noise within a line edge to analyze, whereas a number of lines are still required for suppressing line-to-line variation. Two types of SEM noise mitigation methods, such as the “apparent noise floor” subtraction method and LER-noise decomposition using regression analysis, are verified to successfully mitigate SEM noise from PSD curves. These results are extended to local critical-dimension uniformity (LCDU) measurement to clarify the impact of SEM noise and sampling noise on LCDU.
Proc. SPIE. 10585, Metrology, Inspection, and Process Control for Microlithography XXXII
KEYWORDS: Signal to noise ratio, Edge detection, Metrology, Detection and tracking algorithms, Reliability, Scanning electron microscopy, Process control, Image filtering, Critical dimension metrology, Line edge roughness
Measurement of line edge roughness (LER) is discussed from four aspects: edge detection, PSD prediction, sampling strategy, and noise mitigation, and general guidelines and practical solutions for LER measurement today are introduced. Advanced edge detection algorithms such as wave-matching method are shown effective for robustly detecting edges from low SNR images, while conventional algorithm with weak filtering is still effective in suppressing SEM noise and aliasing. Advanced PSD prediction method such as multi-taper method is effective in suppressing sampling noise within a line edge to analyze, while number of lines is still required for suppressing line to line variation. Two types of SEM noise mitigation methods, "apparent noise floor" subtraction method and LER-noise decomposition using regression analysis are verified to successfully mitigate SEM noise from PSD curves. These results are extended to LCDU measurement to clarify the impact of SEM noise and sampling noise on LCDU.
Voltage contrast (VC) images obtained using an energy filter (EF) were used to measure the bottom surface of high-aspect-ratio structures. The VC images obtained using the conventional EF were sensitive to variations in wafer potential. Since CD-SEM metrology requires precise EF voltage control when using VC images, we developed an EF voltage correction method to be used at each measurement point. Consequently, bottom-edge measurement, independent of the wafer potential fluctuations, was achieved using the newly developed EF. Our developed technique is effective for CD-SEM metrology using VC images.
Voltage contrast (VC) images obtained using an energy filter (EF) were used to measure the bottom surface of high-aspect- ratio (HAR) structures. The VC images obtained using the conventional EF were sensitive to variations in wafer potential. Since CD-SEM metrology requires precise EF voltage control when using VC images, we developed an EF voltage correction method to be used at each measurement point. Consequently, bottom-edge measurement, independent of the wafer potential fluctuations, was achieved by using the newly developed EF. Our developed technique is effective for CD-SEM metrology using VC images.
ArF lithography is still the main technology in the most advanced processes of semiconductor fabrication. Being able to
reliably measure and characterize these lithographic processes in-depth is becoming more and more critical. Critical
Dimension-Scanning Electron Microscope (CD-SEM) continues to be the work horse tool for both in-line critical
dimension (CD) metrology and characterization of ArF photoresist pattern. CD shrink of ArF photoresist has been one of
the major challenges for CD-SEM metrology, and it becomes more difficult to measure shrinkage accurately for smaller
feature size than ~50nm. The authors have developed a new measurement technique of photoresist shrinkage which
measures CD difference between shrunk and non-shrunk sites after etching.
There are many imaging and image processing parameters in CD-SEM which need to be optimized to obtain small
shrinkage and good precision. There is a trade-off relationship between shrinkage and precision, and a comprehensive
and systematic methodology is required for optimization of parameters. The authors have developed an optimization
method that uses Taguchi method, where only 18 experiments are required. We can predict shrinkage, precision and
relative CD offset for any combination of measurement parameter settings used in the 18 experiments by Taguchi
method, and these predicted data can be used for optimization. A new concept of secondary reference metrology is also
introduced in this paper to reduce the number of measurement by a reference metrology tool.
In this work, for the purpose of contact-hole process control, new metrics for contact-hole edge roughness
(CER) are being proposed. The metrics are correlated to lithographic process variation which result in increased electric
fields; a primary driver of time-dependent dielectric breakdown (TDDB). Electric field strength at the tip of spoke-shaped
CER has been simulated; and new hole-feature metrics have been introduced. An algorithm for defining critical
features like spoke angle, spoke length, etc has been defined. In addition, a method for identifying at-risk holes has been
demonstrated. The number of spike holes can determine slight defocus conditions that are not detected though the
conventional CER metrics. The newly proposed metrics can identify contact holes with a propensity for increased
electric field concentration and are expected to improve contact-hole reliability in the sub-40-nm contact-hole process.
Proc. SPIE. 7272, Metrology, Inspection, and Process Control for Microlithography XXIII
KEYWORDS: Electron beams, Edge detection, Electron microscopes, Feature extraction, Atomic force microscopy, Scanning electron microscopy, 3D metrology, Atomic force microscope, Line edge roughness, 3D image processing
Emerging three-dimensional (3D) transistor structures have increased the demand for an easy and practical method to
measure pattern feature metrics (such as CD, line-edge roughness, etc.) as a function of height (z coordinate). We have
examined 3D pattern-profile extraction from a top-view image obtained using a critical-dimension scanning electron
microscope (CD-SEM). An atomic force microscope (AFM) was used to measure 3D pattern profiles as a reference. In
this examination, line-edge positions were firstly obtained from a CD-SEM image at various threshold levels, and the
result was compared with the reference profile measured using the AFM. From this comparison, a mapping function
from threshold levels of CD-SEM image-processing to z coordinates is obtained. Using this mapping function, 3D
pattern profiles were reconstructed from CD-SEM signal profiles, and the obtained profiles were similar to the directly
obtained cross-sectional profile. Put simply, a 3D pattern-profile was extracted from a top-view image successfully.
Though the results are not sufficient to confirm the validity of our method yet, the method may feasibly be introduced
for quick and easy 3D measurement.