At the 14 nm logic node, significant lithographic changes relative to previous technologies are needed to resolve smaller
features with increased fragmentation in mask design and increased use of sub-resolution assist features. Extending the
application of 193 immersion lithography for further generations requires not only continued reduction of traditional
sources of variation but investigation into and quantification of the impact of completely new ones, such as mask twodimensional
(2D) variability. To improve the overall lithography model accuracy, two-dimensional (2D) data from the
mask is required to complete a mask model with an optimal wafer response. This paper characterizes and assesses the
importance of 2D mask effects on thin opaque MoSi on glass (OMOG) masks. Methodologies for characterizing corner
rounding in terms of corner rounding radius and contact area are presented. Optical mask 2D measurements and wafer
print results are summarized.
Extreme Ultraviolet Lithography (EUVL) is the leading candidate for next generation lithography. EUVL has good
resolution because of the shorter wavelength (13.5nm). EUVL also requires a new and complicating mask structure. The
blank complexity and substrate polishing requirements result in defects that are difficult to eliminate or repair. Due to
these challenges, shifting the pattern so that absorber covers the multilayer defects is one option for mitigating the
multilayer defect problem. We investigated the capability and effectiveness of pattern shifting using authentic layouts.
The rough indication of, “how many of what size defects are allowable”, is shown in this paper based on the margin for
the 11nm HP pattern. Only the twenty 300nm-sized defects are allowable for current location accuracy of the blank
inspection and writing tools. On the other hand, sixty70nm-sized defects are allowable for the improved location
inaccuracy. Furthermore we exercised the full process for pattern shift using a leading-edge 50 keV e-beam writer to
confirm feasibility and it was successfully performed.
In order to meet the challenging patterning requirements of the 14 nm node, the semiconductor industry has
implemented use of negative tone develop (NTD) and other tone inversion techniques on wafer to enable use of bright field masks which provide an improved lithography process window.<sup>1,2,3</sup> Due to e-beam write time and mask pattern fidelity requirements, the increased use of bright field masks means that mask makers must focus on improving the performance of their negative tone chemically amplified resist (NCAR) processes. In addition, the move to heavy use of bright field masks is introducing new challenges for mask makers. Bright field masks for 14 nm critical layers are required to have opaque sub-resolution assist features (SRAFs) as small as 50 nm while at the same time having across mask critical dimension uniformity (CDU) of less than 2 nm (3 sigma) to meet the 2014 ITRS targets.<sup>4 </sup>Achieving these specifications is particularly difficult for bright field contact and via level masks.
This paper will survey the performance requirements for NCAR resists for building 14 nm critical level masks. As part of this survey, the results of current commercially available and development NCAR resists will be compared. The study will focus on key elements of the resist process pertaining to line edge roughness, pattern fidelity, minimum feature size, and critical dimension control through density with differences in resist type, sensitivity, and thickness. In addition, use of a novel flow cell test apparatus for detailed study of the develop loading performance of the NCAR resists will be described. Data showing the current capability of these NCAR materials as well as remaining 14 nm node performance gaps and issues will be presented.
The line-edge roughness (LER) of a photomask image has a measurable impact on the corresponding printed wafer LER. This impact increases as wafer exposures move from 193nm DUV to 13.5nm EUV wavelengths since the imaging tool is a low-pass filter with EUV passing more spatial frequencies. Even the high frequency mask LER may impact the wafer image by lowering its image log-slope (ILS). Studying the magnitude and frequency content of mask LER is a first step to reducing the wafer LER. The next step is to determine which components of mask line roughness actually contribute to the wafer line roughness. Order is imposed on this study by fabricating programmed LER patterns on an EUV mask to introduce controlled variations in LER spatial frequency and magnitude. More specifically, line-width roughness (LWR), LER and power spectral density (PSD) are extracted from 64nm and 90nm (1X) pitch lines on a programmed LER EUV photomask. The same mask is then exposed on the ASML EUV Alpha Demo Tool (ADT) at best focus and dose. Three chemically amplified EUV photoresists are evaluated using the programmed LER photomask through PSD and LWR comparisons and the highest performance resist is used for a comprehensive LER transfer analysis. Wafer LWR is extracted from 64nm and 90nm pitch lines and correlated back to the base mask patterns revealing an empirical LWR transfer function (LTF). Finally, the study is extended to 45nm (1X) pitch lines by deploying a pupil filter on the ADT to explore the effect on LWR as the feature sizes shrink.
Extreme ultraviolet (EUV) mask fabrication faces many unique challenges, including more stringent line edge roughness
(LER) requirements. EUV mask absorber LER will need to be reduced to reliably meet the 2013 International Roadmap
for Semiconductors line width roughness target of 3.3 nm. This paper will focus on evaluating resists modified and
deployed specifically to reduce LER on EUV masks. Masks will be built, and the final mask absorber LER reported
considering multiple imaging and analysis techniques. An assessment of best methods for mask LER analysis will be
provided and used to judge resist performance.
EUV mask is a reflection-type-mask, of which film and structure are very different from those of existing masks (e.g.
Cr and MoSi). LWM9000 SEM of Vistec/Advantest was used for measurement of EUV masks. Two types of EUV
masks were used to investigate static and dynamic measurement precision and the impact of charge-up by e-beam
irradiation during measurement. An optional function of LWM9000 SEM was used to improve static precision.
Because the LWM9000 SEM uses ozone for in-situ cleaning of the work chamber, the interaction between the electron
beam and ozone presence was also investigated. The EUV mask was evaluated at the EUV wavelength before and after
e-beam scanning and measurements to determine any changes in reflectance.
The dissolution behaviors of chemically amplified resists for electron beam lithography (EB CARs) have been investigated using the technique of quartz crystal microbalance (QCM) method. We report the first direct measurement of the dissolution rate of EB CARs and the comparison with CAR of using KrF exposure in wafer fabrication. The EB CAR for nano-imprint lithography mold making was also evaluated by this technique, and then resolved 50 nm line and space patterns using conventional 50 KV variable shape beam writing system. The understanding of dissolution kinetics of EB CARs is capable of designing high performance resists in near future.
Electron Projection Lithography (EPL) provides a fundamental advantage in resolution. In this paper, resolution improvement of EPL masks and minimum resolution in EPL exposure are addressed. In order to improve the mask resolution, we applied membranes thinner than typical thickness of 2 um to e-beam scattering layers of the EPL stencil masks. Although strength of the membrane generally deteriorates with decrease in the membrane thickness, the EPL masks having 1-um-thick scattering layers were feasibly fabricated. Reduction of the membrane thickness down to 1 um considerably improved the mask minimum feature size to resolve 120-nm holes and 80-nm lines which corresponded to 30 nm and 20 nm on wafer dimension, respectively, in the 4x demagnification EPL exposure system. The application of the 1-um-thick membrane simultaneously brought the high resolution and good pattern qualities: CD uniformity less than 10 nm in 3σ with pattern sidewall angle range of 90° ± 0.2°. We performed wafer exposure experiments in combination of the EPL exposure tool NSR-EB1A (Nikon) and the 1-um-thick membrane mask, and obtained the resolution performance of 40-nm holes on the wafer. We conclude that the application of the 1-um-thick membrane to the e-beam CD qualities. The exposure resolution of 40-nm holes on the wafer reveals the EPL exposure system to be a potential solution for contact layers in the future technology node.
Stencil masks for electron projection lithography (EPL) require peculiar patterns as perforations in a thin membrane. The stencil pattern accuracy of a conventional mask with 1-mm subfields and a new geometry mask with 4-mm subfields was evaluated and compared. No significant influence of the mask geometry on most of critical dimension (CD) specifications was observed. The stencil patterns in both geometry masks had vertical sidewalls ~ 90° with angle range less than 0.3° and CD uniformity of ~12 nm (3σ) across the mask. CD linearity is also similar for both geometry masks. On the other hand, enlarging the membrane windows considerably increased CD deterioration and image placement (IP) distortion within individual membranes. A practical 4 mm-window mask requires solution to this issue. The stencil pattern accuracy is, however, acceptable level for not only the 1 mm-window mask but also the 4 mm-window mask at current EPL development status. According to the evaluation of the stencil pattern accuracy, pattern specification of the EPL mask for 45-nm node would be achieved with further process optimization despite of its peculiarity in pattern structure.
We have developed PCARs for LEEPL mask making that has high resolution, good CD uniformity and process stability. The proper choice of resists and the process optimization enabled to form 60nm hole patterns and achieved the local CDU<4.0nm at 80nm hole patterns using the current 50 keV VSB exposure system. The results of the examination about PEB temperature and CD revealed that the CD of small hole patterns was controlled by the quencher diffusion rather than the generated acid diffusion. Defocus issue was also investigated and the sensitivity control of a resist was effectively method against CD error. These results in this report clearly indicate the strategy of the resist development for resolve less than 100nm feature size using EB exposure system.
Large window-size membranes for stencil masks are required to increase the throughput of electron projection lithography (EPL) and low-energy electron projection lithography (LEEPL). In this paper, image placement (IP) accuracy and methodology for correcting stress-induced distortions on 4 X EPL masks are addressed. Although the average of local IP errors (| mean | + 3σ) for reference features across an entire 1mm-window EPL mask is 13.4 nm, the average of errors across an entire 4mm-window EPL mask increases to 20.4 nm, which could be reduced to the required budget with further study on EB writing accuracy or IP corrections. In addition we evaluate local IP errors on 4mm-window mask due to pattern gradients by measuring the placement errors at the edge of dense hole arrays. Applying the correction for stress-induced distortions to EB data, we can reduce the placement errors for dense features to 4.6 nm, which is less than the 10 nm budget allocated for 4mm-window EPL mask at the half-pitch features of 45 nm node. For the global IP, only the measurement repeatability of 7.8 nm contributes to the global IP budget measuring all the global position over an entire 4mm-window EPL mask. And we can meet the required global IP budget. Finally, IP accuracy for a single membrane is also presented, showing the IP error is 24.5 nm (| mean | + 3σ), which compares with that of COSMOS type LEEPL mask. Methodology of measuring the position data on a single membrane, however, remains to be developed.
We manufactured LEEPL masks for 65-nm node and evaluated the masks for the critical dimension (CD), image placement (IP) and defects. Although the CD uniformity was 8.0 nm (3σ), an improvement is promising by resist upgrading. The CD linearity was within 5 nm (3σ) through the range of 80- to 300-nm width and the 65-nm hole patterns were successfully resolved. The local and global IP errors obtained were 23.2/16.4 nm and 8.76/6.66 nm (in the x/y directions), respectively. A defect inspection was conducted and detected defects were classified. Most of the defects were miss-placement and miss-size, which seemed to be non-killer defects. On the other hands, foreign materials that must be killer defects were analyzed using energy dispersion X-ray (EDX) and found that they consist of Si. Si fragments mainly came from strut walls and by employing new backside-etching conditions, we improved roughness of strut walls. As a result, no closed defects were detected.