In advanced technological nodes, the photoresist absorbs light, which is reflected by underlying topography during optical lithography of implantation layers. Anti-reflective coating (ARC) helps to suppress the reflections, but ARC removal may damage transistors, not to mention its relatively high cost. Therefore ARC is usually not used, and topography modeling becomes obligatory for printing implantation shapes. Furthermore, presence of Fin Field Effect Transistors (FinFETs) makes modeling of non-uniform substrate reflections exceptionally challenging. <p> </p>
In realistic designs, the same implantation shape may be found in a vertical or in a rotated horizontal orientation. This creates two types of relationships between the critical dimension (CD) and FinFET, namely parallel to and perpendicular to the fins. The measurement data shows that CDs differ between these two orientations. This discrepancy is also revealed by our Rigorous Optical Topography simulator. Numerical experiments demonstrate that the shape orientation may introduce CD differences of up to 45 nm with a 248 nm illumination for 14 nm technology. These differences are highly dependent on the enclosure (distance between implantation shape and active area). One of the major causes of the differences is that in the parallel orientation the shape is facing solid sidewalls of fins, while the perpendicular oriented shape “sees” only perforated sidewalls of the fin structure, which reflect much less energy. <p> </p>
Meticulously stated numerical experiments helped us to thoroughly understand anisotropic behavior of CD measurement. This allowed us to more accurately account for FinFET-related topography effects in the compact implantation modeling for optical proximity corrections (OPC). This improvement is validated against wafer measurement data.
As the industry progresses toward smaller patterning nodes with tighter CD error budgets and narrower process
windows, the ability to control pattern quality becomes a critical, yield-limiting factor. In addition, as the feature size of
design layouts continues to decrease at 32nm and below, optical proximity correction (OPC) technology becomes more
complex and more difficult. From a lithographic point of view, it is the most important that the patterns are printed as
designed. However, unfavorable localized CD variation can be induced by the lithography process, which will cause
catastrophic patterning failures (i.e. ripple effects, and severe necking or bridging phenomenon) through process
variation. It is becoming even more severe with strong off-axis illumination conditions and other resolution enhancement
techniques (RETs). Traditionally, it can be reduced by optimizing the rule based edge fragmentation in the OPC setup,
but this fragmentation optimization is very dependent upon the engineer's skill. Most fragmentation is based on a set of
simple rules, but those rules may not always be robust in every possible design shape.
In this paper, a model based approach for solving these imaging distortions has been tested as opposed to a previous
rule based one. The model based approach is automatic correction techniques for reducing complexity of the OPC recipe.
This comes in the form of automatically adjusting fragments lengths along with feedback values at every OPC iterations
for a better convergence. The stability and coverage for this model based approach has been tested throughout various