With the increasing number of internet users, more and more real-time services are added into the network, such as IPTV,
online-video, Voice over IP, etc. As we know, throughput is a highly important performance criterion for scheduling
algorithms of networks. Besides throughput, these growing real-time services are very sensitive to delay variance termed
as jitter. Therefore, high performance scheduling algorithm should achieve good performance in terms of throughput,
delay, jitter and fairness together. Scheduling algorithm with deadline-awareness employed in packet switching plays a
key role in QoS guarantees.
Although traditional hard-deadline can provide guarantee on in-node delay-deadline criteria, the end-to-end
delay-deadline criteria cannot be guaranteed due to the characteristic of hard-deadline, while the delay-deadline
guaranteed throughput is low. Thus, soft-deadline scheduling algorithm has been proposed. In this paper, we investigate
and compare the classical hard-deadline and soft-deadline switching algorithm. A new scheme "Bonus System" is
proposed in order to realize the idea of soft-deadline switching algorithm. Bonus System based on soft-deadline is
compared with classical Early-Deadline First scheme based on hard-deadline, which shows that Bonus System has better
performance in End-to-End deadline guarantee.
In switch scheduling, jitter becomes an important performance criterion for increasing real-time applications. Low Jitter
Decomposition (LJS) was proposed in the frame-based scheduling switches . However, we notice that in LJS, the
bandwidth requirement of schedule tables is greater than the actual amount of traffic. The redundant bandwidth
requirement not only wastes the resource of switch, but also introduces an extra jitter.
In this paper, we propose two algorithms to reduce the extra jitter caused by redundancy: Integer Average Redundancy
Control (IARC) and Dichotomy Sequence Redundancy Control (DSRC). We demonstrate that the jitter bound of the two
algorithms is lower than that of the scheme without redundancy control. Simulation experiments show that DSRC and
IARC can reduce nearly 50% jitter of the scheme without redundancy control at medium switch load. We also show that
DSRC has a low complexity (<i>O</i>(1) for each input-output pair) which is important for high-speed switches.
Network traffic grows in an unpredictable way, which forces network operators to over-provision their backbone
network in order to meet the increasing demands. In the consideration of new users, applications and unexpected failures,
the utilization is typically below 30% . There are two methods aimed to solve this problem. The first one is to adjust
link capacity with the variation of traffic. However in optical network, rapid signaling scheme and large buffer is
required. The second method is to use the statistical multiplexing function of IP routers connected point-to-point by
optical links to counteract the effect brought by traffic's variation . But the routing mechanism would be much more
complex, and introduce more overheads into backbone network. To exert the potential of network and reduce its
overhead, the use of Valiant Load-balancing for backbone network has been proposed in order to enhance the utilization
of the network and to simplify the routing process. Raising the network utilization and improving throughput would
inevitably influence the end-to-end delay. However, the study on delays of Load-balancing is lack. In the work presented
in this paper, we study the delay performance in Valiant Load-balancing network, and isolate the queuing delay for
modeling and detail analysis. We design the architecture of a switch with the ability of load-balancing for our simulation
and experiment, and analyze the relationship between switch architecture and delay performance.