Mr. Yu Lu Profile

Yu Lu

at Univ of Science and Technology of China

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Proceedings Article | 18 September 2014 Paper

Light field sensor and real-time panorama imaging multi-camera system and the design of data acquisition

Yu Lu, Jiayuan Tao, Keyi Wang

Proceedings Volume 9282, 92822E (2014) https://doi.org/10.1117/12.2068800

KEYWORDS: Cameras, Imaging systems, Sensors, Panoramic photography, Data acquisition, Image processing, Field programmable gate arrays, Optical sensors, Image resolution, Image sensors

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Advanced image sensor and powerful parallel data acquisition chip can be used to collect more detailed and comprehensive light field information. Using multiple single aperture and high resolution sensor record light field data, and processing the light field data real time, we can obtain wide field-of-view (FOV) and high resolution image. Wide FOV and high-resolution imaging has promising application in areas of navigation, surveillance and robotics. Qualityenhanced 3D rending, very high resolution depth map estimation, high dynamic-range and other applications we can obtained when we post-process these large light field data. The FOV and resolution are contradictions in traditional single aperture optic imaging system, and can’t be solved very well. We have designed a multi-camera light field data acquisition system, and optimized each sensor’s spatial location and relations. It can be used to wide FOV and high resolution real-time image. Using 5 megapixel CMOS sensors, and field programmable Gate Array (FPGA) acquisition light field data, paralleled processing and transmission to PC. A common clock signal is distributed to all of the cameras, and the precision of synchronization each camera achieved 40ns. Using 9 CMOSs build an initial system and obtained high resolution 360°×60° FOV image. It is intended to be flexible, modular and scalable, with much visibility and control over the cameras. In the system we used high speed dedicated camera interface CameraLink for system data transfer. The detail of the hardware architecture, its internal blocks, the algorithms, and the device calibration procedure are presented, along with imaging results.

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