We demonstrate a compact trench-based silicon-on-insulator (SOI) rib waveguide ring resonator comprised of trench-based bends and splitters. It has a perimeter of 50 µm and occupies an area of only 25×25 µm. The measured free spectral range (FSR) is 13.2 nm, which the largest reported for an SOI rib waveguide ring resonator. The measured FSR, full width at half maximum, and quality factor match reasonably well with analytical calculations. Further calculation shows that a FSR of 50.8 nm is achievable for an SOI rib waveguide ring resonator with a perimeter of 15 µm.
Silicon-on-insulator (SOI) is a widely recognized as a very promising material for high-index integrated photonic chips
because of its compatibility with complementary metal oxide semiconductor (CMOS) technologies. One challenge in
integrating many photonic devices on a single chip is to realize compact waveguide bends and splitters, particularly for
rib waveguide geometries. We report compact SOI rib waveguide 90° bends and splitters with SU8-filled trenches based
on total internal reflection (TIR). We use the two-dimensional finite difference time domain (2D-FDTD) method to
numerically calculate bend and splitter efficiencies. The maximum bend efficiency is 98.0%. The splitter efficiency is
49.0% for transmission and 48.9% for reflection with an 80 nm wide SU8-filled trench. Electron beam lithography
(EBL) is used to accurately position the trench interface relative to the waveguides and to pattern the 80 nm wide trench.
Inductively coupled plasma reactive ion etching (ICP RIE) is used to achieve a vertical sidewall. For fabricated bends
the measured bend loss is 0.32±0.02 dB/bend (93% bend efficiency) for TE polarization at a wavelength of 1.55 microns,
which is the lowest SOI rib waveguide 90° bend loss reported in literature. The initial measured splitter efficiency is
54.6% for transmission and 29.2% for reflection. This can be improved by avoiding defects in fabricated structures.