We have developed and evaluated the large full well capacity (FWC) for wide signal detection range and low temporal noise for high sensitivity lock-in pixel CMOS image sensor (CIS) embedded with two storage-diodes (SDs). In addition, for fast charge transfer from photodiode (PD) to SDs, a lateral electric field charge modulator (LEFM) is used for the developed lock-in pixel. As a result, the time-resolved CIS achieves a very large FWC of approximately 7000e-, low temporal random noise of 1.17e-rms at 45fps with true correlated double sampling (CDS) operation, and fast intrinsic response less than 500ps at 635nm. The proposed imager has an effective pixel array of 128(H)×256(V) and a pixel size of 11.2×11.2μm<sup>2</sup>. The sensor chip is fabricated by a Dongbu HiTek 1P4M 0.11μm CIS process.
Recently, CMOS time-resolved imaging devices are being widely used for scientific and medical applications. A fluorescence lifetime imaging microscopy (FLIM), which is a powerful analysis tool in fundamental physics as well as in the life science, is a typical application for the time-resolved imaging devices. For better time-resolution in the lock-in pixel design, a multi-tap pixel architecture is very effective and useful. In this paper, we have proposed an 8-tap CMOS lock-in pixel with lateral electric field charge modulator (LEFM) and demonstrated the effectiveness of designed pixel by CAD simulation. The proposed pixel makes possible to measure the highly time-resolved images with a high signal to noise ratio (SNR) and to observe various images of cells even if a sample has a multi-lifetime component. An 8-tap time-resolved CMOS image sensor chip is developed by 0.11μm 1P4M CIS process technology.