A compact electro-optical “NOR” logic gate device based on silicon-on-insulator (SOI) platform is proposed and investigated theoretically. By introducing a hook-type waveguide, the signal could be coupled between the bus and hook-type waveguide to form an optical circuit and realize NOR logic gate. We can easily realize the NOR logical function by the voltage applied on the coupling components. The numerical simulation shows that a high coupling efficiency of more than 99% is obtained at the wavelength of 1550 nm, and the footprint of our device is smaller than 90 μm2. In addition, the response time of the proposed NOR logic gate is 3 ns with a switching voltage of 1.8 V. Moreover, it is demonstrated that such NOR logic gate device could obtain an extinction ratio of 21.8 dB. Thus, it has great potential to achieve high speed response, low power consumption, and small footprint, which fulfill the demands of next-generation on-chip computer multiplex processors.
Waveguide morphology, as well as etched surface, is one of the most important factors deciding the performance of
optical waveguide devices. In this work, we present a combination using photoresist/aluminum bilayer mask for the ICP etching of PZT (Pb(Zr1-xTix)O3) thin films. The etching results of PZT thin films with different etching methods and
various etching conditions were investigated. It was found that using ICP in 30/10sccm CHF3/Ar mixture and 3Pa could
help reduce the defects and contaminations on the etched surface of PZT thin films. Compared with 250W/60W dual-
electrode ICP etching, a more vertical etch profile of PZT waveguide could be obtained through 100W single-electrode ICP etching under the optimal conditions.