Since its introduction at Luminescent Technologies and continued development at Synopsys, Inverse Lithography Technology (ILT) has delivered industry leading quality of results (QOR) for mask synthesis designs. With the advent of powerful, widely deployed, and user-friendly machine learning (ML) training techniques, we are now able to exploit the quality of ILT masks in a ML framework which has significant runtime benefits. In this paper we will describe our MLILT flow including training data selection and preparation, network architectures, training techniques, and analysis tools. Typically, ILT usage has been limited to smaller areas owing to concerns like runtime, solution consistency, and mask shape complexity. We will exhibit how machine learning can be used to overcome these challenges, thereby providing a pathway to extend ILT solution to full chip logic design. We will demonstrate the clear superiority of ML-ILT QOR over existing mask synthesis techniques, such as rule based placements, that have similar runtime performance.
Inverse imaging has been long known to provide a true mathematical solution to the mask
design problem. However, it is often times marred by problems like high run-time, mask
manufacturability costs, and non-invertible models. In this paper, we propose a mask synthesis
flow for advanced lithography nodes, which capitalizes on the inverse mask solution while still
overcoming all the above problems. Our technique uses inverse mask technology (IMT) to
calculate an inverse mask field containing all the useful information about the AF solution. This
field is fed to a polygon placement algorithm to obtain initial AF placements, which are then cooptimized
with the main features during an OPC/AF print-fix routine to obtain the final mask
solution. The proposed flow enables process window maximization via IMT while guaranteeing
fully MRC compliant masks. We present several results demonstrating the superiority of this
approach. We also compare our IMT-AFs with the best AF solution obtained using extensive
brute-force search (via a first principles simulator, S-litho), and prove that our solution is
A challenge in model-based assist feature placement is to find optimal placements while satisfying
mask rules and preventing AF printing. There are numerous strategies for achieving this ranging
from fully rule-based methods to pixel-based inversion. Our proposed solution is to identify the
optimal locations of assist features using modeling information based strictly on optics and resist
stack optical characteristics. Once these positions have been found, preliminary AFs can be placed.
At this point suggested sizes and shapes can be identified, although these can later be modified. In a
later step, MRC cleanup, printability fixing, and main-pattern OPC can be performed simultaneously.
This has the advantage of allowing the use of the full process model to predict the location of OPC
edges accurately, and use calibrated or 3d mask models to determine assist feature printing behavior.
This correction is done while maintaining MRC constraints. In this flow, an AF placement field,
generated from the pre-OPC target patterns, can be used to provide accurate guidance on how to
move assist features to get the most benefit while keeping other constraints in mind. Using this
method, a range of printability fixing strategies, guided by placement benefits, is available. We
present data showing that the benefit of AF placements can be determined from optical parameters,
on target (non-OPC) data, and that this method leads to beneficial yet compliant masks.