Advanced nodes require tighter and tighter overlay control to secure products yield. Market like automotive one are even more demanding on “overlay reliability” till the extreme edge of wafers. High order models including Correction per Exposure capabilities are now introduced on the most critical immersion layers to put extra correction on the edge of wafers scanner fields. To ensure a correction model able to bring back these fields under overlay specification, the understanding of key process/equipment parameters to be put under control is needed. In this paper, choices done in term of overlay and Run to Run model will be discussed. On tools aspects, scanner table clean frequency impact and etch chambers variability will be addressed. In addition, etch recipe can modulate this etch chamber effect. The paper will conclude on the compromise to face in order to better correct and control overlay at the Edge of Wafer with the current Litho/Etch tools capabilities and R2R model strategy, at an acceptable cost (tool efficiency) and effort (rework, R2R complexity, …)
As the industry moves from node to node, lithographers have been pushed to use complex models to correct overlay errors and drive down model residuals. High order models are now used in combination with Correction per Exposure capabilities for critical layers on immersion scanners . Mean overlay intrafield signatures are linked to the reticles (current and reference) and illuminations used, therefore the intrafield High Order Process Correction (iHOPC) model should be as stable as possible in terms of correction parameters. However, iHOPC data shows that the overlay parameters can drift over time and a Run to Run can follow these slow drifts. IHOPC R2R integration in production overlay correction flow is discussed in this paper: How corrections are generated from overlay measurement? What metrics are used to secure the model application? What results on production lots can be achieved? Then, a focus is made on the model variability. To operate properly, the R2R needs a high frequency variability as low as possible. Some factors like scanner lens aberration correction, metrology tool matching, measurement layouts, have been found to have an impact on lot-to-lot variability. These effects will be investigated in this paper to provide a conclusion on the usage of an iHOPC R2R for mean overlay intrafield signatures.
Over the past few years, patterning edge placement error (EPE), which combines information on variability of pattern sizes and placement between adjacent device layers, has been established as the key metric for patterning budget generation and holistic patterning control. More recently, the emergence of high-throughput SEM tools that provide inspection and large-volume CD metrology capabilities has enabled unprecedented statistical analysis of on-product pattern variability.
In the current paper we address edge placement budget generation as well as potential for improved patterning control for an HVM use case at the 28nm litho node. Edge placement and possible related defect mechanisms arise most critically at the contact layer, where contact hole patterning and EPE, with respect to both underlying gate and active layers need to be well controlled. At the 28nm node and for automotive applications, variability control within 5-sigma, i.e. to failure rates below 1 ppm, is generally required to ensure device reliability.
To support generation of an EPE budget by wafer data that captures inter and intra-field components, including local stochastic variations, we use a high-throughput, large field-of-view SEM tool from Hermes Microvision, at all three process layers of interest, as well as YieldStar metrology for overlay characterization. The large volume of data being made available -tens of millions of individual CD measurements- allows mapping out the low-probability ends of variability distributions and detecting non-Gaussian ‘fat tails’ indicative of defect rates that would be underestimated by 3-sigma estimates. Data analysis includes decomposing the total pattern variations into sources of variability, such as global CDU, mask variations and local stochastics. In addition to established CD metrology, we apply novel SEM image based analysis of repetitive patterns in SRAM arrays to generate 2-dimensional process variability bands, including estimates of pattern placement. This approach allows to investigate in detail the probabilistic interaction between active, gate and contact layers.