Overlay control is more challenging when DRAM volume production continues to shrink its critical dimention (CD) to 70nm and beyond. Effected by process, the overlay behavior at wafer edge is quite different from wafer center. The big contribution to worse overlay at wafer edge which causes yield loss is misalignment. The analysis in wafer edge suggests that high order uncorrectable overlay residuals are often observed by certain process impact. Therefore, the basic linear model used for alignment correction is not sufficient and it is necessary to introduce an advanced alignment correction model for wafer edge overlay improvement. In this study, we demonstrated the achievement of moderating the poor overlay at wafer edge area by using a high order wafer alignment strategy. The mechanism is to use non-linear correction methods of high order models ( up to 5th order), with support by the function High Order Wafer Alignment (known as HOWA) in scanner. Instead of linear model for the 6 overlay parameters which come from average result, HOWA alignment strategy can do high order fitting through the wafer to get more accurate overlay parameters which represent the local wafer grid distortion better. As a result, the overlay improvement for wafer edge is achieved. Since alignment is a wafer dependent correction, with HOWA the wafer to wafer overlay variation can be improved dynamically as well. In addition, the effects of different mark quantity and sampling distribution from HOWA are also introduced in this paper.
The results of this study indicate that HOWA can reduce uncorrectable overlay residual by 30~40% and improve wafer-to-wafer overlay variation significantly. We conclude that HOWA is a noteworthy strategy for overlay improvement. Moreover, optimized alignment mark numbers and distribution layout are also key factors to make HOWA successful.
This paper discusses the most efficient mask re-qualification inspection mode for production memory reticles in
an advanced memory fab. Progressive and haze defects continue to be the primary cause of mask degradation and mask
re-clean mainly due to intensified density of photon energy involved with ArF exposure. Direct reticle inspection has
been widely implemented in wafer fabs to provide early warning of haze defects before they reach critical levels.
However, reticle inspection systems are increasingly challenged by aggressive optical proximity correction (OPC), subresolution
assist feature (SRAF) and high requirement to detect printable defects. As we know Die-to-Die (D2D) mode
has good sensitivity on main pattern but can't cover scribe line area. In this paper, we studied the integration inspection
mode which combines Die-to-Die (D2D) on main pattern area and Stralight2+ on scribes and frames area. The detection
capability of StarLight2+ and D2D on DRAM masks was evaluated and results shows that aggressive patterns (OPC,
SRAF) are resolved well and provide early warning for crystal growth type defect on mask. The objective of this paper is
to demonstrate both StarLight2+ and D2D capability to support memory wafer mask qualification requirements.